Introduction to Cadence - UPC

simulators. The signals that go from one domain to the other are implemented with interface elements thatperform the proper signal conversion.d) Transistor level simulation using the extracted layout:Switch view list: spectre extracted schematicStop view list: spectreThis is another example of the importance of the order. For a particular circuit it should be a schematicView that contains the circuit description. If the layout of this circuit has been completed, it is possible togenerate an extracted View that contains the transistor level circuit derived from the layout, including parasitics.If this is the circuit that has to be simulated, the extracted View must be placed before the schematic View in theSwitch view list.e) Behavioral simulation using ahdl models:Switch view list: spectre ahdl schematicStop view list: spectre ahdlIt is also possible to have a behavioral description of a circuit in addition to the circuit schematic. Thisbehavioral view will simulate much faster. If we want the netlister to select this view instead of the schematicView of the cell, we must place ahdl View before schematic View in the Switch view list. Since ahdl View is alsoa simulation view, it must be added to the Stop view list.Lets consider the following OpAmp circuit, where the following views are available:abstractahdlextractedlayoutschematicsymbolNext table shows the number of components and the simulation time for some of the previous simulationconfigurations.Smulation # components Simulation timea) Schematic 30 0,85 sd) Extracted 129 1,43 se) AHDL 9 0,35 s6 Introduction to schematic capture and simulation using Cadence DFW-II