Single-Chip Low Cost Low Power RF-Transceiver (Rev. B

CC250014.3 Byte SynchronizationByte synchronization is achieved by acontinuous sync word search. The sync wordis a 16 bit configurable field (can be repeatedto get a 32 bit) that is automatically inserted atthe start of the packet by the modulator intransmit mode. The demodulator uses thisfield to find the byte boundaries in the streamof bits. The sync word will also function as asystem identifier, since only packets with thecorrect predefined sync word will be received ifthe sync word detection in RX is enabled inregister MDMCFG2 (see Section 17.1). Thesync word detector correlates against theuser-configured 16 or 32 bit sync word. Thecorrelation threshold can be set to 15/16,16/16, or 30/32 bits match. The sync word canbe further qualified using the preamble qualityindicator mechanism described below and/or acarrier sense condition. The sync word isconfigured through the SYNC1 and SYNC0registers.In order to make false detections of syncwords less likely, a mechanism calledpreamble quality indication (PQI) can be usedto qualify the sync word. A threshold value forthe preamble quality must be exceeded inorder for a detected sync word to be accepted.See Section 17.2 on page 35 for more details.15 Packet Handling Hardware SupportThe CC2500 has built-in hardware support forpacket oriented radio protocols.In transmit mode, the packet handler can beconfigured to add the following elements to thepacket stored in the TX FIFO:• A programmable number of preamblebytes• A two byte synchronization (sync) word.Can be duplicated to give a 4-byte syncword (recommended). It is not possible toonly insert preamble or only insert a syncword.• A CRC checksum computed over the datafieldThe recommended setting is 4-byte preambleand 4-byte sync word, except for 500 kBauddata rate where the recommended preamblelength is 8 bytes.In addition, the following can be implementedon the data field and the optional 2-byte CRCchecksum:• Whitening of the data with a PN9sequence.• Forward error correction by the use ofinterleaving and coding of the data(convolutional coding).In receive mode, the packet handling supportwill de-construct the data packet byimplementing the following (if enabled):• Preamble detection• Sync word detection• CRC computation and CRC check• One byte address check• Packet length check (length byte checkedagainst a programmable maximum length)• De-whitening• De-interleaving and decodingOptionally, two status bytes (see Table 21 andTable 22) with RSSI value, Link QualityIndication, and CRC status can be appendedin the RX FIFO.Bit Field name Description7:0 RSSI RSSI valueTable 21: Received Packet Status Byte 1(first byte appended after the data)Bit Field name Description7 CRC_OK 1: CRC for received data OK (orCRC disabled)0: CRC error in received data6:0 LQI The Link Quality Indicatorestimates how easily a receivedsignal can be demodulatedTable 22: Received Packet Status Byte 2(second byte appended after the data)Note that register fields that control the packethandling features should only be altered whenCC2500 is in the IDLE state.SWRS040B Page 29 of 92