12.07.2015 Views

Single-Chip Low Cost Low Power RF-Transceiver (Rev. B

Single-Chip Low Cost Low Power RF-Transceiver (Rev. B

Single-Chip Low Cost Low Power RF-Transceiver (Rev. B

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CC250018.2 InterleavingData received through radio channels willoften experience burst errors due tointerference and time-varying signal strengths.In order to increase the robustness to errorsspanning multiple bits, interleaving is usedwhen FEC is enabled. After de-interleaving, acontinuous span of errors in the receivedstream will become single errors spread apart.CC2500 employs matrix interleaving, which isillustrated in Figure 14. The on-chipinterleaving and de-interleaving buffers are 4 x4 matrices. In the transmitter, the data bitsfrom the rate ½ convolutional coder are writteninto the rows of the matrix, whereas the bitsequence to be transmitted is read from thecolumns of the matrix. Conversely, in thereceiver, the received symbols are written intothe columns of the matrix, whereas the datapassed onto the convolutional decoder is readfrom the rows of the matrix.When FEC and interleaving is used at leastone extra byte is required for trellistermination. In addition, the amount of datatransmitted over the air must be a multiple ofthe size of the interleaver buffer (two bytes).The packet control hardware thereforeautomatically inserts one or two extra bytes atthe end of the packet, so that the total lengthof the data to be interleaved is an evennumber. Note that these extra bytes areinvisible to the user, as they are removedbefore the received packet enters the RXFIFO.When FEC and interleaving is used theminimum data payload is 2 bytes.InterleaverWrite bufferInterleaverRead bufferPacketEngineFECEncoderModulatorInterleaverWrite bufferInterleaverRead bufferDemodulatorFECDecoderPacketEngineFigure 14: General Principle of Matrix InterleavingSWRS040B Page 39 of 92

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