Intel(R) 80219 General Purpose PCI Processor Evaluation Platform ...

IQ80310 and IQ80219 ComparisonsAThis appendix provides a brief description for differences between IQ80219 and IQ80310. Please alsorefer to application note: Migrating from the Intel ® 80310 I/O Processor Chipset to the Intel ® 80219General Purpose PCI Processor Application Note 273562.Table 90.Intel ® IQ80310 and Intel ® IQ80219 evaluation platform board ComparisonsFeaturesIntel ® IQ80219 Evaluation Platform Board“Worchester”Intel ® IQ80310 Evaluation Platform Board“Cyclone”I/O ProcessorIntel ® 80219 general purpose PCI processorIntel ® 80310 I/O processor chipset -Consists ofIntel ® 80200 processor and Intel ® 80312 I/Ocompanion chipCore/MicroprocessorTechnologyIntel XScale ® microarchitectureIntel XScale ® microarchitectureMemory Technology PC1600 DDR SDRAM (100 MHz Clock) PC100 SDRAM (100 MHz Clock)Form FactorPC/Server/BackplaneConnectionExtended PC board that attaches to aPC/Server/Backplane – One PCI-X Expansion SlotPCI-X 133-MHz/64-Bits orPCI 66 MHz/64 BitsExtended PC board that attaches to aPC/Server/Backplane – Two PCI Expansion SlotsPCI 66 MHz/64 BitsExpansion Card Slot One PCI-X 133-MHz/64-bit Two PCI 66 MHz/64 bitsPCI/PCI-X BridgeInterrupt RoutingTimersLocal/Peripheral BusFlash MemorySerial Debug PortIBM PCI-X BridgeReference: IBM 133 PCI-X Bridgehttp://www.chips.ibm.com/External interrupts are routed through the XINTpins on the 80219. They include INTA, INTB formPCI-X expansion slot, INTA from 82544 GBE, andUART interrupt – Steering and Status registers arein 80219 – see Intel ® 80219 General Purpose PCIProcessor Developer’s ManualInternal to 80219 – Refer to Intel ® 80219 GeneralPurpose PCI Processor Developer’s Manual32-bit/33-100MHz multiplexed bus with sixchip-enables, Synch/Asynchronous (IQ80219operates in 33 MHz Asynchronous mode) –Refer to PBI section in Intel ® 80219 GeneralPurpose PCI Processor Developer’s Manual16-bit, 8 MB accessed through Peripheral Buswith chip-enable 0 (PCE0)One UART on the Peripheral bus – 16C550deviceIntegrated PCI bridge in 80312.UART1, UART2, External Timer, and SecondaryINTD are multiplexed in the CPLD andconnected to 80312 external interrupt (XINT3).Secondary PCI INTA, B, C are straight throughconnection to 80312 XINT0, 1, 2.In CPLD8-bit multiplexed Flash-bus with twochip-enables8-bit, 8 MB accessed trough Flash-Bank 1 withchip-enable 1 (RCE1)Two UART on the Flash bank with some logic inthe CPLD – 16C550 deviceNetwork Debug Port Intel® 82544 GbE on the PCI-X busIntel® 82559 PRO100 device on the secondaryPCI BusRotary Switch Same SameLED HEX Display Same SameJTAG20-PIN ARM CompliantLogic Analyzer ConnectionBoard Manual 85