"Linear Equation Solver using CMOS Technology" - Microelectronic ...

After verifying the correct operation of the final digital solver with 4 unknowns, the scale is extendedto system of equations with 8 unknowns. Therefore, the digital solver with 8 unknowns is designed byapplying exactly the same topology and principles as in the case with 4 unknowns (Figure 8).However it is important to note that as the scale is extended, the CK_distribution block getscomplicated. Therefore, it is not actually designed, the clock allocation is rearranged for eachsimulated input in VHDL test bench instead. The implementation results will be elaborated in the nextchapter.19