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"Linear Equation Solver using CMOS Technology" - Microelectronic ...

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A2 VHDL CodesA2.1.Initial <strong>Solver</strong> (4 unknowns)A2.1.1.Gen<strong>Solver</strong>4_noDFF.vhdlibrary IEEE;use IEEE.STD_LOGIC_1164.ALL;use IEEE.STD_LOGIC_ARITH.ALL;use IEEE.STD_LOGIC_UNSIGNED.ALL;entity Gen<strong>Solver</strong>4 isPort (A_in : in STD_LOGIC_VECTOR (1 to 16);B_in : in STD_LOGIC_VECTOR (1 to 4);X_out : out STD_LOGIC_VECTOR (1 to 4));end Gen<strong>Solver</strong>4;architecture Behavioral of Gen<strong>Solver</strong>4 issignal Xout1, Xout2, Xout3, Xout4: std_logic;beginprocess (A_in, B_in, Xout1, Xout2, Xout3, Xout4)beginXout1

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