ABCs of ADCs - Analog-to-Digital Converter Basics (PDF)

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SNR - Signal-to-Noise Ratio+ =Noise Signal Noisy SignalSignalAmplitude (dB)SNR of Ideal ADC =6.02n + 1.76 dBNoise LevelFREQUENCY (Hz)18Signal-to-Noise Ratio (SNR) is the ratio of the output signal amplitude to the output noise level, notincluding harmonics or dc. A signal level of 1V RMS and a noise level of 100µV RMS yields an SNR of10 4 or 80dB. The noise level is integrated over half the clock frequency.SNR usually degrades as frequency increases because the accuracy of the comparator(s) withinthe ADC degrades at higher input slew rates. This loss of accuracy shows up as noise at the ADCoutput.In an A/D converter, noise comes from four sources: (1) quantization noise, (2) noise generated bythe converter itself, (3) application circuit noise and (4) jitter.Quantization noise results from the quantization process--the process of assigning an output codeto a range of input values. Recall our discussion on quantization error. The amplitude of thequantization noise decreases as resolution increases because the size of an LSB is smaller athigher resolutions, which reduces the maximum quantization error. The theoretical maximumsignal-to-noise ratio for an ADC with a full-scale sine-wave input derives from quantization noiseand is defined as 20 * log(2 (n-1) x sqrt(6) ), or about 6.02n + 1.76 dB.Application circuit noise is that noise seen by the converter as a result of the way the circuit isdesigned and laid out. We will discuss jitter later.SNR increases with increasing input amplitude until the input gets close to full scale. The SNRincreases at the same rate as the input signal until the input signal approaches full scale. That is,increasing the input signal amplitude by 1 dB will cause a 1 dB in increase in SNR. This is becausethe step size becomes a smaller part of the total signal amplitude as the the signal amplitudeincreases. When the input amplitude starts approaching full scale, however, the rate of increase ofSNR vs. input signal decreases.SNR performance decreases at higher frequencies because the effects of jitter get worse, as wewill see.ABCs of ADCs - Rev 3, June 2006Authored by: Nicholas “Nick” Gray18Copyright © 2003, 2004, 2006 National SemiconductorCorporationAll rights reserved
THD - Total HarmonicDistortionAnalogSpectrumAnalyzerPure Sine WaveFrequency XXSquare WaveFrequency XAnalogSpectrumAnalyzerX 3X 5XA/DFFTHarmonic DistortionPure Sine WaveFrequency XX 2X 3X 4X 5X19THD gives an indication of a circuit’s linearity in terms of its effect on the harmonic content of asignal. An ideal, spectrally-pure sine wave has one frequency component. A complex signalsuch as music or speech has multiple frequency components. A square wave contains oddharmonics with specific amplitude and phase relationships. Ideally, a signal processing systemwill not add or subtract any harmonic components (unless that is the intended function of thesignal processor). Non-linearities in a converter’s transfer function, however, will produceharmonics that were not present in the original signal. Symmetrical non-linearities tend toproduce harmonics at odd multiples of the input frequency, half rave rectification tends toproduce even harmonics, while all other non-linearities tend to produce harmonics at allmultiples of the input frequency.THD is the ratio of the rms total of the first given number harmonic components to the RMSvalue of the output signal and relates the RMS sum of the amplitudes of the harmonics to theamplitude of the fundamental:THD =V f2 2 + V f3 2 + . . . + V fn2V f12where V f1 is the fundamental amplitude, V f2 is the second harmonic amplitude, etc.As a practical matter, there is no such thing as a completely linear input to output transferfunction. This non-linearity leads to output distortion. As the input signal swing increases inamplitude, the output becomes more and more distorted. The result is an increase in distortionas the input amplitude increases.THD performance degrades with increasing frequency because the effects of jitter get worseand because the input circuitry becomes slew limited.THD can be expressed as a percentage or in dB.ABCs of ADCs - Rev 3, June 2006Authored by: Nicholas “Nick” Gray19Copyright © 2003, 2004, 2006 National SemiconductorCorporationAll rights reserved
Page 1 and 2: ABCs of ADCsAnalog-to-Digital Conve
Page 3 and 4: What Is an ADC?• Mixed-Signal Dev
Page 5 and 6: Least Significant Bit (LSB)andMost
Page 7 and 8: Quantization Error111Digital Output
Page 9 and 10: Offset Error111OUTPUT CODE110101100
Page 11 and 12: Gain Error (Full-Scale GainError)Ga
Page 13 and 14: DNL1111101010.3 LSB;DNL = -0.7Ideal
Page 15 and 16: Integral Non-Linearity (INL)orInteg
Page 17: Total Unadjusted Error101OUTPUT COD
Page 21 and 22: 1Signal-to-Noise and Distortion(SIN
Page 23 and 24: ENOB - Effective Number OfBits• E
Page 25 and 26: Input Dynamic RangeDynamic Range is
Page 27 and 28: Sources of Noiseand DistortionABCs
Page 29 and 30: Inadequate Supply Bypassing• Nois
Page 31 and 32: V A - DR Decoupling• ADC Outputs
Page 33 and 34: Output to Input Coupling• Output
Page 35 and 36: Noisy Components/Circuitry• ADC I
Page 37 and 38: Clock Noise• Clock Can Add Noise
Page 39 and 40: Common Design Mistakes• Inadequat
Page 41 and 42: Noisy Components/Circuitry• ADC I
Page 43 and 44: Better Conditioning Circuitry22 220
Page 45 and 46: Resistor Pack Danger500*V REF +V RE
Page 47 and 48: Clock Noise• Clock Can Add Noise
Page 49 and 50: Excessive Clock Jitter (cont’d)No
Page 51 and 52: Treating the Clock LineAs a Trace
Page 53 and 54: A Better Reference CircuitLM4040-4.
Page 55 and 56: High Speed ADCs FromNational: 10-bi
Page 57 and 58: High Speed ADCs FromNational: 14 &
Page 59 and 60: Other General Purpose ADCsFrom Nati
Page 61 and 62: ADC Web Site• Site: www.national.
Page 63 and 64: Absolute Maximum Ratings - Voltages

ABCs of ADCs - Analog-to-Digital Converter Basics (PDF)

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