ABCs of ADCs - Analog-to-Digital Converter Basics (PDF)

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Actual Case• THD Much better than SNR so SINAD tracks SNR• SINAD (and ENOB) maximum at Full ScaleDYNAMIC PERFORMANCE vs INPUT LEVEL(General Case Actual)100PERFORMANCE (dB)806040200-80 -60 -40 -20 0INPUT LEVEL (dBFS)SNRTHDSINAD22The THD performance of today’s ADCs is so good that it does not change much (if any at all)with input level, so SINAD is dominated by SNR, which is not as good as THD, resulting in aSINAD that closely tracts SNR.ABCs of ADCs - Rev 3, June 2006Authored by: Nicholas “Nick” Gray22Copyright © 2003, 2004, 2006 National SemiconductorCorporationAll rights reserved
ENOB - Effective Number OfBits• ENOB says that the ADC is equivalent tothis (ENOB) number of bits as far asSINAD is concerned. That is, a converterwith an ENOB of 7.0 has the same SINADas a theoretically perfect 7-bit converter.ENOB =SINAD - 1.766.0223Effective Bits (also called Effective Number Of Bits, or ENOB) is a specification that helps toquantify dynamic performance. ENOB says that the converter performs as if it were atheoretically perfect converter with a resolution of ENOB. That is, an ENOB of 7.5 bits saysthat converter performs, as far as SINAD is concerned, as if it were an ideal 7.5-Bit ADC.The ideal (perfect) ADC has absolutely no distortion and the only noise it exhibits isquantization noise, so SNR then equals SINAD. Since we know that SINAD for an ideal A/Dconverter is (6.02n + 1.76) dB, we can substitute “ENOB” for “n” and calculate:ENOB =where SINAD is expressed in dB.SINAD - 1.766.02So, the number of effective bits is another method of specifying SINAD. It says that theconverter is equivalent to a perfect ADC of this (ENOB) number of bits.ENOB degrades as frequency increases and as input level decreases for the same reasonsthat THD and SNR degrade with frequency increase and improves as input level increases.Remember, ENOB comes from SINAD, which comes from THD and SNR.ABCs of ADCs - Rev 3, June 2006Authored by: Nicholas “Nick” Gray23Copyright © 2003, 2004, 2006 National SemiconductorCorporationAll rights reserved
Page 1 and 2: ABCs of ADCsAnalog-to-Digital Conve
Page 3 and 4: What Is an ADC?• Mixed-Signal Dev
Page 5 and 6: Least Significant Bit (LSB)andMost
Page 7 and 8: Quantization Error111Digital Output
Page 9 and 10: Offset Error111OUTPUT CODE110101100
Page 11 and 12: Gain Error (Full-Scale GainError)Ga
Page 13 and 14: DNL1111101010.3 LSB;DNL = -0.7Ideal
Page 15 and 16: Integral Non-Linearity (INL)orInteg
Page 17 and 18: Total Unadjusted Error101OUTPUT COD
Page 19 and 20: THD - Total HarmonicDistortionAnalo
Page 21: 1Signal-to-Noise and Distortion(SIN
Page 25 and 26: Input Dynamic RangeDynamic Range is
Page 27 and 28: Sources of Noiseand DistortionABCs
Page 29 and 30: Inadequate Supply Bypassing• Nois
Page 31 and 32: V A - DR Decoupling• ADC Outputs
Page 33 and 34: Output to Input Coupling• Output
Page 35 and 36: Noisy Components/Circuitry• ADC I
Page 37 and 38: Clock Noise• Clock Can Add Noise
Page 39 and 40: Common Design Mistakes• Inadequat
Page 41 and 42: Noisy Components/Circuitry• ADC I
Page 43 and 44: Better Conditioning Circuitry22 220
Page 45 and 46: Resistor Pack Danger500*V REF +V RE
Page 47 and 48: Clock Noise• Clock Can Add Noise
Page 49 and 50: Excessive Clock Jitter (cont’d)No
Page 51 and 52: Treating the Clock LineAs a Trace
Page 53 and 54: A Better Reference CircuitLM4040-4.
Page 55 and 56: High Speed ADCs FromNational: 10-bi
Page 57 and 58: High Speed ADCs FromNational: 14 &
Page 59 and 60: Other General Purpose ADCsFrom Nati
Page 61 and 62: ADC Web Site• Site: www.national.
Page 63 and 64: Absolute Maximum Ratings - Voltages

ABCs of ADCs - Analog-to-Digital Converter Basics (PDF)

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