ABCs of ADCs - Analog-to-Digital Converter Basics (PDF)

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LSB Values by Resolution andReference Voltage• The value of an LSB depends upon theADC Reference Voltage and ResolutionV REF Resolution 1 LSB1.00V 8 3.9062 mV1.00V 12 244.14 µV2.00V 8 7.8125 mV2.00V 10 1.9531 mV2.00V 12 488.28 µV2.048V 10 2.0000 mV2.048V 12 500.00 µV4.00V 8 15.625 mV4.00V 10 3.9062 mV4.00V 12 976.56 µV6NCG 9/99Since one LSB is equal to V REF / 2 n , it stands to reason that better accuracy (lower error) canbe realized if we did either (or both) of two things: (1) use a higher resolution converter and/or(2) use a smaller reference voltage.The problem with higher resolution (more bits) is the cost. Also, the smaller LSB means it isdifficult to find a really small signal as it becomes lost in the noise, reducing SNR performanceof the converter.The problem with reducing the reference voltage is a loss of input dynamic range. Again, wealso can lose a small signal in the noise, causing a loss of SNR performance.ABCs of ADCs - Rev 3, June 2006Authored by: Nicholas “Nick” Gray6Copyright © 2003, 2004, 2006 National SemiconductorCorporationAll rights reserved
Quantization Error111Digital Output1101011000110100011 LSBERROR0000 V REFV REF3V REFV REF4 3V REF2 5V REF4 7V REFV REF8 88 8Input (V)1 LSB0The Magnitude of the Error Ranges from Zero to 1 LSB7Continuing with the simple example of a 3-bit ADC, an ADC input of zero produces an output code ofzero (000). As the input voltage increases towards V REF /8, the error also increases because the inputis no longer zero, but the output code remains at zero because a range of input voltages isrepresented by a single output code. When the input reaches V REF /8, the output code changes from000 to 001, where the output exactly represents the input voltage and the error reduces to zero. Asthe input voltage increases past V REF /8, the error again increases until the input voltage reachesV REF /4, where the error again drops to zero. This process continues through the entire input rangeand the error plot is a saw tooth, as shown here.The maximum error we have here is 1 LSB. This 0 to 1 LSB range is known as the “quantizationuncertainty” because there are a range of analog input values that could have caused any given codeand we are uncertain at to exactly what the input voltage was that caused a given code. Themaximum quantization uncertainty is also known as the “quantization error”. This error results fromthe finite resolution of the ADC. That is, the ADC can only resolve the input into 2 n discrete values.Each output code represents a range of input values. This range of values is a quanta, to which weassign the symbol q.The converter resolution, then, is 2 n . So, for an 8 Volt reference (with a unity gain factor), a 3-bitconverter resolves the input into V REF /8 = 8V/8 = 1 Volt steps. Quantization error, then, is a round offerror.But an error of 0 to 1 LSB is not as desirable as is an error of ± 1 / 2 LSB, so we introduce an offset intothe A/D converter to force an error range of ± 1 / 2 LSB.ABCs of ADCs - Rev 3, June 2006Authored by: Nicholas “Nick” Gray7Copyright © 2003, 2004, 2006 National SemiconductorCorporationAll rights reserved
Page 1 and 2: ABCs of ADCsAnalog-to-Digital Conve
Page 3 and 4: What Is an ADC?• Mixed-Signal Dev
Page 5: Least Significant Bit (LSB)andMost
Page 9 and 10: Offset Error111OUTPUT CODE110101100
Page 11 and 12: Gain Error (Full-Scale GainError)Ga
Page 13 and 14: DNL1111101010.3 LSB;DNL = -0.7Ideal
Page 15 and 16: Integral Non-Linearity (INL)orInteg
Page 17 and 18: Total Unadjusted Error101OUTPUT COD
Page 19 and 20: THD - Total HarmonicDistortionAnalo
Page 21 and 22: 1Signal-to-Noise and Distortion(SIN
Page 23 and 24: ENOB - Effective Number OfBits• E
Page 25 and 26: Input Dynamic RangeDynamic Range is
Page 27 and 28: Sources of Noiseand DistortionABCs
Page 29 and 30: Inadequate Supply Bypassing• Nois
Page 31 and 32: V A - DR Decoupling• ADC Outputs
Page 33 and 34: Output to Input Coupling• Output
Page 35 and 36: Noisy Components/Circuitry• ADC I
Page 37 and 38: Clock Noise• Clock Can Add Noise
Page 39 and 40: Common Design Mistakes• Inadequat
Page 41 and 42: Noisy Components/Circuitry• ADC I
Page 43 and 44: Better Conditioning Circuitry22 220
Page 45 and 46: Resistor Pack Danger500*V REF +V RE
Page 47 and 48: Clock Noise• Clock Can Add Noise
Page 49 and 50: Excessive Clock Jitter (cont’d)No
Page 51 and 52: Treating the Clock LineAs a Trace
Page 53 and 54: A Better Reference CircuitLM4040-4.
Page 55 and 56: High Speed ADCs FromNational: 10-bi
Page 57 and 58:
High Speed ADCs FromNational: 14 &
Page 59 and 60:
Other General Purpose ADCsFrom Nati
Page 61 and 62:
ADC Web Site• Site: www.national.
Page 63 and 64:
Absolute Maximum Ratings - Voltages
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ABCs of ADCs - Analog-to-Digital Converter Basics (PDF)

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