ABCs of ADCs - Analog-to-Digital Converter Basics (PDF)

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Distortion vs.. Linearity (8 Bits)LinearVout = (Vin) 1.05SR = 200Mspsfund = 45.0195 MHz2 nd = 90.039 MHz3 rd = 64.9415 MHz4 th = 19.922 MHz5 th = 25.0975 MHz6 th =70.117 MHzVout = (Vin) 1.02Vout = (Vin) 0.9520These FFT plots, made with our WaveVision software, shows the distortion that results withdifferent amounts and types of non-linearity.The top left plot shows the results with a linear transfer function. All dynamic parameters aremaximized.The lower left plot is the result of an input to output transfer function ofOutput = Input 1.02The top right plot is the result of an input to output transfer function ofOutput = Input 1.05The bottom right plot results from an input to output transfer function ofOutput = Input 0.95At the right of the screen capture you see the harmonic frequencies. The output frequency cannever be higher than 1 / 2 the sample rate because of aliasing. Note how the harmonicamplitude increases as the exponent in the input to output transfer function departs from unity.ABCs of ADCs - Rev 3, June 2006Authored by: Nicholas “Nick” Gray20Copyright © 2003, 2004, 2006 National SemiconductorCorporationAll rights reserved
1Signal-to-Noise and Distortion(SINAD)SINAD = -20 * Log10 -SNR10+ 10 THD10SINAD = 10 * Log110 -SNR10+ 10 THD1021Signal-to-Noise And Distortion (SINAD) or Signal-to-Noise and Distortion Ratio (SNDR), orSignal-to-Noise Plus Distortion (S/N+D), is a combination of the SNR and the THDspecifications. It is defined as the RMS value of the output signal to the RMS value of all of theother spectral components below half the clock frequency, including harmonics but excludingdc, and can be calculated from SNR and THD according to either of the the formula here.Because it compares all undesired frequency components with the input frequency, it is anoverall measure of ADC dynamic performance.Since SINAD incorporates both SNR and THD with equal weighting, SINAD might appear tobe maximum when SNR and –THD are equal to each other. However, modern ADCs exhibitsuch low distortion that SNR never approaches –THD very closely and SINAD tends to bemaximum at or very near a full-scale input, assuming the system response is adequate.ABCs of ADCs - Rev 3, June 2006Authored by: Nicholas “Nick” Gray21Copyright © 2003, 2004, 2006 National SemiconductorCorporationAll rights reserved
Page 1 and 2: ABCs of ADCsAnalog-to-Digital Conve
Page 3 and 4: What Is an ADC?• Mixed-Signal Dev
Page 5 and 6: Least Significant Bit (LSB)andMost
Page 7 and 8: Quantization Error111Digital Output
Page 9 and 10: Offset Error111OUTPUT CODE110101100
Page 11 and 12: Gain Error (Full-Scale GainError)Ga
Page 13 and 14: DNL1111101010.3 LSB;DNL = -0.7Ideal
Page 15 and 16: Integral Non-Linearity (INL)orInteg
Page 17 and 18: Total Unadjusted Error101OUTPUT COD
Page 19: THD - Total HarmonicDistortionAnalo
Page 23 and 24: ENOB - Effective Number OfBits• E
Page 25 and 26: Input Dynamic RangeDynamic Range is
Page 27 and 28: Sources of Noiseand DistortionABCs
Page 29 and 30: Inadequate Supply Bypassing• Nois
Page 31 and 32: V A - DR Decoupling• ADC Outputs
Page 33 and 34: Output to Input Coupling• Output
Page 35 and 36: Noisy Components/Circuitry• ADC I
Page 37 and 38: Clock Noise• Clock Can Add Noise
Page 39 and 40: Common Design Mistakes• Inadequat
Page 41 and 42: Noisy Components/Circuitry• ADC I
Page 43 and 44: Better Conditioning Circuitry22 220
Page 45 and 46: Resistor Pack Danger500*V REF +V RE
Page 47 and 48: Clock Noise• Clock Can Add Noise
Page 49 and 50: Excessive Clock Jitter (cont’d)No
Page 51 and 52: Treating the Clock LineAs a Trace
Page 53 and 54: A Better Reference CircuitLM4040-4.
Page 55 and 56: High Speed ADCs FromNational: 10-bi
Page 57 and 58: High Speed ADCs FromNational: 14 &
Page 59 and 60: Other General Purpose ADCsFrom Nati
Page 61 and 62: ADC Web Site• Site: www.national.
Page 63 and 64: Absolute Maximum Ratings - Voltages

ABCs of ADCs - Analog-to-Digital Converter Basics (PDF)

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