User's Manual - chipdb.org

Chapter 1
1.1 Characteristics
32
TM
The VR4300,
VR4305,
and VR4310
are members of the NEC VR
Series RISC
(Reduced Instruction Set Computer) microprocessors and is a high-performance
TM
64-bit microprocessor employing the RISC architecture developed by MIPS .
TM
Its instructions are upward-compatible with the instructions of the VR3000
Series and are completely compatible with those of the VR4400
and VR4200.
Therefore, existing applications can be used as is with the VR4300,
VR4305,
and
VR4310.
The VR4300,
VR4305,
and VR4310
have the following features:
• Internal operating frequency:
80 MHz max. ( mPD30200-80),
100 MHz max. ( mPD30200-100),
133 MHz max. ( mPD30200-133,
30210-133),
167 MHz max. ( mPD30210-167)
• 64-bit architecture supporting 64-bit data processing
• Optimized, 5-stage pipeline processing
• High-speed translation lookaside buffer (TLB) supporting virtual
addresses (of 32 double entries)
• Address space Physical: 32 bits
Virtual: 40 bits (64-bit mode)
31 bits (32-bit mode)
• Supports single-precision and double-precision floating-point
operations
• On-chip cache memories
Instruction: 16 KB
Data: 8 KB
• Employs write back cache system ® store operation via system bus
decreased
• 32-bit external bus interface facilitating system development
• Multiplies external operating frequency (input clock and bus
interface) to create internal operating frequency.
Multiple is selected on power application
( mPD30200-80:
´ 1, ´ 2, or ´ 3)
( mPD30200-100:
´ 1.5, ´ 2, or ´ 3)
( mPD30200-133:
´ 2, ´ 3, or ´ 4)
( mPD30210-133:
´ 2, ´ 2.5, ´ 3, or ´ 4)
( mPD30210-167:
´ 2, ´ 2.5, ´ 3, ´ 4, ´ 5, or ´ 6)
User’s Manual U10504EJ7V0UM00