Bias Circuit

11.3 Operational Amplifier Offset
Ideally, an opamp is balanced such that the dc output is zero (with dual power supply) with
zero input voltage (as in Fig. 11.1). In practice, this is not realized, due to the variation of
parameters between similar transistors and components. As mentioned above, the opamp
configuration of Fig. 11.1 will probably be locked at near the positive or negative rail voltage.
Thus, a given opamp requires an input voltage Vin to set the output to zero. The magnitude of
this voltage is defined as offset voltage Voff.
An equivalent circuit that includes the offset voltage is given in Fig. 11.6. The imperfections of
the amplifier are reflected into the offset voltage and the opamp is ideal. If Vi is made equal to
Voff, the output VO will be zero. Suppose that Vi = 0. In this case we have the equivalent of Voff
applied to the input and the output is driven toward the plus or minus power-supply voltages
(depending on the polarity of Voff). Voff is usually large enough to cause the amplifier to be
driven out of the active mode. For example, a typical Voff is Voff = 1 mV. Thus, if avo = 40,000,
the output will attempt to become –40 V, which is probably greater than the supply voltage
value; the output is set at the negative limit. In our project opamp, this will be roughly VSS +
50 mV if driven negative or VDD –1V if driven toward the positive supply.
Figure 11.6. Ideal opamp with offset voltage. With dc input voltage Vi
= Voff, VO = 0. Witt Vi = 0 (grounded input), VO VDD or VSS with
|avoVoff| > VDD or |VSS| for Voff negative or positive, respectively.