Bias Circuit

3.1 Physical Description of the MOSFET
A diagrammatic NMOS is shown in Fig. 3.1. The device consists of a three-layer structure of
metal–oxide–semiconductor (MOS). A two-terminal MOS structure (connections to metal and
semiconductor) is essentially a parallel-plate capacitor. In the same manner as for a normal
capacitor, when a positive gate voltage, VG, is applied with respect to the p-type body (for
NMOS) [i.e., with respect to the metal contact on the underside of the p-type semiconductor
body (or substrate)], negative charges are induced under the oxide layer in the semiconductor.
When VG (with respect to the semiconductor body) exceeds the threshold voltage, Vtno, a
channel of free-carrier electrons forms under the oxide; that is, the onset of the channel
occurs when VG = Vtno. The substrate is n type for the PMOS and the channel is made up of
free-carrier holes.
Figure 3.1. MOS transistor consisting of a metal – oxide –
semiconductor layered structure (plus a metal body contact on the
bottom). A positive gate voltage, VG > Vtno, induces a conducting
channel under the oxide, which connects the two n regions, source and
drain. All voltages are with respect to VB, that is, the body (substrate)
of the transistor. (a) No channel; (b) uniform channel; (c) channel is
just pinched off at the drain end of the channel; (d) channel length is
reduced due to drain pn-junction depletion region extending out along
the channel.
An n-channel MOSFET device is then completed by fabricating n regions, source and gate, for
contacting the channel on both ends of the channel. For VG < Vtno [Fig. 3.1(a)] there is no
channel under the oxide, and the two n regions are isolated pn junctions. When VG > Vtno and
source voltage, VS, and drain voltage, VD, are both zero (all with respect to the body) [Fig.
3.1(b)] a uniform-thickness n-type channel exists along the length of the oxide layer and the
source and drain regions are connected by the channel. Thus, the channel is a voltagecontrolled
resistor where the two ends of the resistor are at the source and drain and the
control voltage is applied at the gate.