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Bias Circuit

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P9.3 Determination of the PMOS Parameters<br />

Procedure<br />

• Parameters.vi sweeps output channel Chan0_out from VDD –1 to VDD + 1<br />

(where the design bias VDD is set in the Front Panel). The gain measurement<br />

will be made at VDD, intermediate to the sweep range. Since voltage VSD is<br />

approximately equal to 2VSG, VSD will be relatively constant during the sweep,<br />

as is required for a reliable measurement of Kp and Vtpo.<br />

• Run the VI for VDD set at 6 V and 8V and verify that Vtpo is close to the<br />

same for both VDD values. For the larger VDD (and VSD), kp (at VSD) should<br />

be slightly larger.<br />

• Now set VDD = 6, 7, or 8 V and the File Mode switch to Green (on) and re-<br />

run to obtain a parameter data file. The file has RD1, RD2, kp (technically, )<br />

and Vtpo. The Parameters are actually for M2. These will be read by the<br />

evaluation Mathcad file.<br />

• The parameters can be obtained with SimParam.vi from the data saved in<br />

Parameters.vi. Paste the data from the Indicator Graph (sample, VDD = 7<br />

V) of Parameters.vi into the Control Graph of SimParam.vi and run the VI<br />

with the Data Mode switch set to on (Green).

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