Bias Circuit

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With the substitution of (4.11) in (7.11), the gain is Equation 7.12 In modern integrated circuits, resistor RS will be replaced with a current-source output resistance, which is significantly greater than RS. The source-follower gain is, in this case, approximately (with no external load) Equation 7.13 Parameter η will typically be in the range 0.1 < η < 0.2. Note that the body effect degrades the "gain" significantly below the ideal unity. In the project on the source-follower circuit, we measure the voltage transfer function of the source follower for a range of dc drain current with body and source connected and with the body connected to VSS. Τηε ρεσυλτινγ χυρϖεσ ωιλλ βε χοµπαρεδ το δεµονστρατε τηε βοδψ εφφεχτ ον τηε τρανσφερ φυνχτιον. Α χυρϖε φιτ οφ τηε ΣΠΙΧΕ εθυατιον το µεασυρεδ δατα ωιλλ προϖιδε φορ αν αλτερνατιϖε δετερµινατιον οφ πα ραµετερ γn. This value should be close to the value obtained from dc measurements.
7.4 Summary of Equations Threshold voltage VS = 0 zero volts and negative power supply VSS. Source-follower voltage gain with Vsb = 0. Source-follower voltage gain with Vsb = IdRs. gmb = ηgm Body-effect transconductance. Source-follower body-effect degradation factor.
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Copyright Library of Congress Catal
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National Improvements | Virtual Ins
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formulations, the results from Math
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Hardware and Software Requirements
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Chan0_out Pin 21 Chan0_in Pin 68 Gn
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LabVIEW VI Libraries and Project an
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1.1 Resistor Voltage Divider and MO
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1.3 Frequency Response of the Ampli
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At f = flo, . This, by definition,
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1.5 Exercises and Projects Project
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2.1 BJT and MOSFET Schematic Symbol
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2.2 Fundamentals of Signal Amplific
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2.3 Basic NMOS Common-Source Amplif
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Using (2.4), (2.5), (2.9), and (2.1
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Unit 3. Characterization of MOS Tra
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In electronic circuit applications,
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The output-characteristic equation
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Equation 3.11 From the data measure
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The input circuit loop equation (Fi
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which leads to the result (3.5), re
Page 44 and 45: 3.6 Exercises and Projects Project
Page 46 and 47: Unit 4. Signal Conductance Paramete
Page 48 and 49: 4.2 Transistor Variable Incremental
Page 50 and 51: 4.3 Transconductance Parameter The
Page 52 and 53: 4.4 Body-Effect Transconductance Pa
Page 54 and 55: 4.5 Output Conductance Parameter Th
Page 56 and 57: With a 1 - V drop across RS and a 5
Page 58 and 59: By the nature of the load-line func
Page 60 and 61: Unit 5. Common-Source Amplifier Sta
Page 62 and 63: 5.2 Amplifier Voltage Gain This dc
Page 64 and 65: etween the drain and source of the
Page 66 and 67: 5.3 Linearity of the Gain of the Co
Page 68 and 69: where av Vds/Vgs and where the appr
Page 70 and 71: is attached directly to the gate. B
Page 72 and 73: 5.5 Design of a Basic Common-Source
Page 74 and 75: = VGSo - Vtno at the high and low e
Page 76 and 77: RG can be selected somewhat arbitra
Page 80 and 81: 6.1 Grounded-Source Amplifier: Coup
Page 82 and 83: and Equation 6.6 Note that the "RC"
Page 84 and 85: 6.4 Load Coupling Capacitor The com
Page 87 and 88: 6.5 Summary of Equations MOSFET cou
Page 89 and 90: Unit 7. MOSFET Source-Follower Buff
Page 91 and 92: 7.2 Source-Follower Voltage Transfe
Page 93: 7.3 Body Effect and Source-Follower
Page 97 and 98: Unit 8. MOSFET Differential Amplifi
Page 99 and 100: 8.2 DC Imbalances In a real transis
Page 101 and 102: 8.3 Signal Voltage Gain of the Idea
Page 103 and 104: 8.4 Effect of the Bias Resistor on
Page 105 and 106: 8.5 Differential Voltage Gain Suppo
Page 107 and 108: 8.7 Voltage Gains Including Transis
Page 109 and 110: 8.7.2 Common-Gate Amplifier Stage T
Page 111 and 112: with RD1 = RD2 and gm1 = gm2. In th
Page 113 and 114: It follows that the gain for the in
Page 115 and 116: 8.9 Amplifier Gain with Differentia
Page 117 and 118: 8.11 Summary of Equations Rs = Ris2
Page 121 and 122: 9.1 Basic Current Source An example
Page 123 and 124: 9.2 Current Source with Source Dege
Page 125 and 126: If the magnitude of the voltage acr
Page 127 and 128: Any slight possible difference in
Page 129 and 130: Unit 10. Common-Source Amplifier wi
Page 131 and 132: 10.2 Signal Voltage Gain The expres
Page 133 and 134: 10.3 Summary of Equations Output dr
Page 135 and 136: Unit 11. Operational Amplifiers wit
Page 137 and 138: 11.1.1 Voltage Gain of the Noninver
Page 139 and 140: This expression can be manipulated
Page 141 and 142: 11.3 Operational Amplifier Offset I
Page 143 and 144: where the approximation usually app
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where Avo is the amplifier gain at
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12.1 Operational Amplifier Integrat
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This demonstrates that for the circ
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with a steady-state value of Vop. A
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Equation 12.25 A good estimate come
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13.1 Combining NMOS and PMOS Circui
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13.3 Stabilization of Signal Gain a
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An estimate of the new output volta
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This produces (9.9) from Ro = Vo/Io
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Equation 13.13 where 13.12 has been
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The open-loop transconductance is G
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Unit 14. Development of a Basic CMO
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14.2 Current-Source Output Resistan
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14.3 Current-Source Load for the Co
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14.4 Current-Source Load for the Di
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the node (exclusive of the separate
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14.5 Two-Stage Amplifier with Curre
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14.6 Output Buffer Stage It is evid
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Suppose that ID6 = 400 µA, W6 = 50
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Av and Ro are calculated once, usin
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Since the source follower of M1 has
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14.9 Summary of Equations CMRR = 1
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Unit A. Communicating with the Circ
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Place AI Acquire Waveform.vi in the
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Click from the Front Panel or Diagr
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Now go to the Diagram (under Menu W
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To complete connections to the term
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Now use the Edit Text Tool to edit
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on the left in the diagram . The Wh
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Figure A.15. Frame of Sequence Stru
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The transition regions are nonabrup
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during the oscilloscope measurement
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Unit B. Characterization of the Bip
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junction diodes, the current is lar
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common to the input and output and
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B.2 Base-Width Dependence on Juncti
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Figure B.8. Diodelike characteristi
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The minus sign comes from having as
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Figure B.10. Circuit for measuring
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B.5 Output Characteristics of BJT i
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After measuring the output characte
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B.6 SPICE Solution for IC versus VC
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B.7 Collector-Emitter Voltage and C
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B.8 DC as a Function of Collector C
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B.10 Summary of Equations Common-em
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Unit C. Common-Emitter Amplifier St
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The equation set above has three un
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The output-resistance parameter, ro
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of βDC as possible. Signal paramet
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Equation C.17 We note that the magn
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C.4 Accuracy of Transistor Gain Mea
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C.5 Effect of Finite Slope of the T
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It follows that for this case, f3dB
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C.7 Common-Emitter Amplifier with A
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Equation C.41 where IC IC(VCE), tha
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Applied voltage Vo sums up to Equat
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C.7.3 DC (Bias) of the NPN - PNP Am
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where Equation C.58 and Equation C.
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Equation C.67 The result is signifi
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The following form of the result pr
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This is equivalent to a unity-gain
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C.11 Summary of Circuit Equations B
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C.12 Exercises and Projects Project
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P1.1 Resistor Voltage-Divider Measu
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• Place AO Update Channel.vi in F
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• (Optional) To install the circu
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Procedure • Set your value of RG2
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• In the Diagram, we will add Get
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P1.4 Resistor Voltage Divider with
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• Now move the capacitor C2 = C1
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P2.1 NMOS Common-Source Circuit wit
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• In the Diagram (below), place,
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P2.2 NMOS Common-Source Amplifier w
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P2.3 Amplifier with Signal and Gain
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• Connect to FG1Chan.vi, the vari
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P3.1 SPICE Parameters and Pin Diagr
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P3.3 PMOS Transistor Use pins 6 (ga
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Procedure • Run PMOSlinear.vi and
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Procedure • Run PMOSparsub.vi wit
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Procedure • Run PMOSparam.vi to r
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Active Region Procedure • Install
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Laboratory Project 4. Characterizat
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P4.2 NMOS Transistor Use CD4007 pin
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P4.4 NMOS Parameters from the Trans
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P4.5 NMOS Lambda from the Transfer
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P4.6 NMOS Gamma SubVI Components No
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• Set RS. With NMOSgamsub.vi open
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• A file can be obtained from the
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P5.1 SPICE Equations and Pin Diagra
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P5.3 Amplifier Gain at One Bias Cur
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P5.4 Amplifier Gain versus Bias Cur
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Laboratory Project 6. PMOS Common-
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P6.2 SPICE PMOS and Circuit Equatio
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P6.4 Amplifier Gain LabVIEW Computa
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P6.5 Amplifier Frequency Response P
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P7.1 Chip Diagram and SPICE Equatio
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P7.3 Amplifier Gain at Optimum Bias
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P7.4 Optimum Bias Stability Test
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P7.5 Amplifier Frequency Response P
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Laboratory Project 8. NMOS Source-
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P8.2 Source-Follower DC Evaluation
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available for the next VI. It is us
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Laboratory Project 9. MOSFET Differ
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P9.2 DC Evaluation of the Single-Po
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P9.3 Determination of the PMOS Para
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Gains will be obtained from the gra
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• Run SweepSim.vi to obtain the d
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Laboratory Project 10. Current Mirr
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P10.2 Evaluation of the Current-Sou
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P10.4 Evaluation of the Bias Setup
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Laboratory Project 11. Operational
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P11.2 Bias Circuit Setup 1 Offset N
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P11.3 Opamp Offset Voltage Componen
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P11.4 Evaluation of the Bias Balanc
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VOH • Reset the Chan0_out Range,
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P11.6 Evaluation of the Gain with S
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P11.7 Determination of the Opamp Fr
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Laboratory Project 12. Operational
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P12.2 Opamp Integrator Components R
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Procedure • Turn off the power su
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Laboratory Project A. Communicating
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PA.2 Sending and Receiving Voltages
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Bipolar TABLE PA.2 0 to +5V 1.22 mV
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PA.5 Observing the Oscilloscope Out
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of the DAC. The steps are 2.44 mV f
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• The example here illustrates th
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Laboratory Project B. Characterizat
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PB.2 SPICE Equations SPICE Equation
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parameters nF and IS. • Connect C
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PB.4 DC versus the Collector Curren
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• Now open VI, IC_VCE.vi. Set the
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Laboratory Project C1. NPN Common-
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PC.2 DC Circuit Setup and Parameter
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PC.3 Amplifier Gain at One Bias Cur
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PC.4 Amplifier Gain versus Bias Cur
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• Run FreqResp.vi. Verify that in
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PC.6 SPICE Equations and Pin Diagra
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• Determine the value of VAF spec
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• Set the Run Mode switch to Set
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• Now reset VCC(init) and VBB(ini
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Bias Circuit

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