Bias Circuit

14.6 Output Buffer Stage
It is evident from the gain result, (14.29), that the high gain depends on having a high
resistance at the output; a relatively small load resistor can reduce the gain substantially. For
example, suppose that the amplifier is to be used as a resistance feedback amplifier as shown
in Fig. 14.6. The input is at the gate of M2, and the feedback resistor is connected back to the
gate of M1. The load at the output is Rf + R2 || RO.
Figure 14.6. Opamp with feedback resistor Rf. The feedback circuit
adds load Rf + R2 in parallel with external load, RO, at the output.
For a specific example, assume that RO >> Rf >> R2 such that the load is approximately Rf.
With the additional load, the gain (14.30) becomes
Equation 14.31
which is the result of Rf being in parallel with the output resistance of the common-source
stage. Suppose that Rf = 10 kΩ and ID3 = 100 µA. In this case the gain would drop to about
400 (from about 4400), which would be unacceptable, as proper operation of opamps assumes
a very high gain.
This loading problem is substantially eliminated with the addition of a buffer stage to isolate
the load from the output node of the common-source stage, as shown in the circuit of Fig.
14.7. The source-follower buffer stage is made up of M6 and M13. The current-source bias
transistor M13 also uses the reference voltage provided by M10. The load on the commonsource
stage of M3 is now infinite. The feedback network is included in the circuit for comparing
with the diagrammatic version of the circuit of Fig. 14.6.
Figure 14.7. Three-stage amplifier with the addition of the sourcefollower
(buffer) stage.