10.04.2013 Views

YK CENTRIFUGAL LIQUID CHILLER OptiView ... - Johnson Controls

YK CENTRIFUGAL LIQUID CHILLER OptiView ... - Johnson Controls

YK CENTRIFUGAL LIQUID CHILLER OptiView ... - Johnson Controls

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

The imbalance is not checked until the unit has been<br />

running for at least 45 seconds and the average of the<br />

three phases of motor current is > 80% of the<br />

programmed 100% unit Full Load Amps.<br />

The average is calculated as:<br />

The imbalance is calculated as:<br />

LCSSS - PHASE (X) SHORTED SCR<br />

(Flash memory Card version C.MLM.01.04 or later)<br />

A shorted SCR in phase A, B or C (designated as X in<br />

the message) has been detected by the LCSSS<br />

logic/trigger board. The voltage across each SCR in<br />

monitored to detect the shorted condition. The shorted<br />

condition must exist for 5 seconds in order to annunciate<br />

the fault.<br />

This check is disabled while the unit is running. The unit<br />

can be started after the condition has been corrected<br />

and the 'COMPRESSOR' switch is cycled to the<br />

'STOP-RESET' (O) position.<br />

LCSSS - OPEN SCR<br />

Iave =<br />

An open SCR has been detected by the LCSSS<br />

logic/trigger board. The open condition must exist for 5<br />

seconds in order to annunciate the fault. The unit can be<br />

started after the condition has been corrected and the<br />

'COMPRESSOR' switch is cycled to the 'STOP-RESET'<br />

(O) position.<br />

This check is disabled when the unit is shut down.<br />

In certain applications, local power supply<br />

conditions could interfere with the open SCR<br />

detection technique. The check should be<br />

disabled by a qualified Service Technician<br />

using manual 160.54-M1.<br />

LCSSS - PHASE ROTATION<br />

(Ia+Ib+Ic)<br />

3<br />

(Ia-Iave) + (Ib-Iave) + (Ic-Iave)<br />

2(Iave)<br />

x 100<br />

(Flash memory Card version C.MLM.01.04 or later)<br />

The LCSSS logic/trigger board has detected the three<br />

phase compressor motor supply voltage phase rotation<br />

is not correct. The unit can be restarted when the phase<br />

rotation is correct and the 'COMPRESSOR' switch is<br />

cycled to the 'STOP-RESET' (O) position.<br />

10.4.2 Safety Shutdown Messages Models with<br />

Compressor Motor Variable Speed Drive<br />

These messages are generated by events that occur<br />

within the Variable Speed Drive (VSD). The unit can be<br />

started after manual resets are performed as detailed<br />

below.<br />

Service and troubleshooting information is<br />

contained in manual 160.00-M1.<br />

VSD SHUTDOWN – REQUESTING FAULT DATA<br />

The VSD has shut down the unit and the control panel<br />

has not yet received the cause of the fault from the VSD,<br />

via the serial communications link. The VSD shuts down<br />

the unit by opening the motor controller 'VSD Stop<br />

Contacts' (located on the VSD logic board and<br />

connected between TB6-16 and TB6-53 in the control<br />

panel).<br />

The microprocessor board in the control panel then<br />

sends a request for the cause of the fault to the VSD<br />

logic board via the Adaptive Capacity Control (ACC)<br />

board, over the serial link. Since serial communications<br />

are initiated every 2seconds, this message is typically<br />

displayed for a few seconds and then replaced with one<br />

of the following fault messages.<br />

VSD – STOP CONTACTS OPEN<br />

160-54-OI-GB0 43<br />

SEE ‘VSD SHUTDOWN – REQUESTING FAULT<br />

DATA‘<br />

If the microprocessor board in the control panel does<br />

not receive the cause of the fault over the serial link<br />

within 20 seconds, it is assumed it is not available and<br />

that message is replaced with this message.<br />

VSD – 105% MOTOR CURRENT OVERLOAD<br />

This shutdown is generated by the VSD logic board and<br />

it indicates that a motor overload has occurred. The<br />

shutdown is generated when the VSD logic board has<br />

detected that at least 1 of the 3 output phase currents<br />

has exceeded 105% of the unit Full Load Amps (FLA)<br />

value for > 7 seconds.<br />

The unit FLA value is set by adjustment of the FLA<br />

potentiometer on the VSD logic board. The unit can be<br />

started after the 'RESET' push-button on the VSD logic<br />

board is pressed and the 'COMPRESSOR' switch is<br />

cycled to the 'STOP-RESET' (O) position.

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!