PhD Thesis Arne Lüker final version V4 - Cranfield University

Sol-Gel derived Ferroelectric Thin Films for Voltage Tunable Applications
1 1 1
tan δ device = = + , with Q
Q Q Q
device
dielectric
electrode
electrode ω
1
= [Eq. 5.1]
R C
with Rs the series resistance of the electrodes. It should be clear that a low electrode
resistivity means a high electrode quality factor and thus a low total device loss.
Fan et al. [11, 12] has confirmed this concept as described in section 4.1. However, his
realisation of a Cu bottom electrode for BST was relatively complicated due to the fact
that different diffusion barrier layer were needed on either sides of the Cu electrode: a Ta
diffusion barrier on top the Si substrate to inhibit Cu diffusion, and a TiAl layer as barrier
against oxygen diffusion into the Cu layer to inhibit Cu oxidation during the deposition
and annealing of the BST thin film.
A layer transfer method was used in this example. The method relies on the transfer of
a ferroelectric film from an auxiliary- to a device substrate, and thus completely prevents
the exposure of the bottom electrode to high temperatures and destructive reactive
atmospheres. Here, the bottom electrode no longer serves as a seed layer for ferroelectric
film growth and therefore can be freely chosen. This enables the use of low resistivity
materials like Au and Cu, which due to their thermal instability and corrosive properties
are not commonly used in conventional parallel-plate capacitors.
However, the initial process steps are the same as described above. A 4’’-Si- wafer,
with a Ti/Pt seed layer and 10 layers of PST 50/50. For adhesion purposes, a thin TiW
layer (10 nm) was sputtered on top of the PST on which a 650 nm thick Cu bottom
1000 nm SiO2
650 nm Cu
660 nm PST
100 nm Pt
Si substrate
TiW
TiW
Ti
Si substrate
100 nm Pt
660 nm PST
650 nm Cu
1000 nm SiO2
Quartz
Cu
S
660 nm PST
650 nm Cu
1000 nm SiO2
Quartz
Fig. 5.11: Schematic illustration of the fabrication of Cu/PST/Cu varactors
by layer transfer
TiW
103