Xeon-Phi-Coprocessor-Datasheet

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which will cause the frequency to drop to the minimum possible value (refer to Section 3.2.1). The level and duration of the power surge are programmable by the end user (refer chapter on manageability for more details). Additionally, there may be applications that draw up to 245W. This should be taken into account when choosing one of the three modes of operation as listed below: — Users can install both the 2x4 and 2x3 power connectors for total available power of 300W. In this case, the card may draw up to 245W of power depending on the application. This mode ensures sufficient power is available and reduces the risk of throttling. Users may see power dissipation approach 245W, as applications become more highly tuned to take advantage of the Intel® Xeon Phi coprocessor architecture. — Users can install either the 2x4 connector only or two 2x3 connectors for total available power of 225W. The card is designed to support power surges of up to 236W. If the power surge goes above 236W for more than 300ms, then the SMC on the card will instruct the Intel® Xeon Phi coprocessor to drop its operating frequency by approximately 100MHz, thus reducing power dissipation by approximately 10W. — If a greater card power limitation is desired, users can configure the SMC to further limit the power draw of the 5110P SKU, ensuring compatibility with less capable power delivery systems (refer to Section 6.5). 5.2 Intel ® Xeon Phi Coprocessor Power States Figure 5-1 to Figure 5-8 are a schematic representation of the inter-relationship between the different coprocessor and memory power states on the Intel ® Xeon Phi coprocessor. These schematic representations are only for illustrative purposes and do not represent all possible low power states. Cx and Mx refer to coprocessor and memory power states. Figure 5-1. Coprocessor in C0-state and Memory in M0-state M0 M0 M0 M0 M0 M0 VR C0 (Full on) Fan ~100% M0 M0 M0 M0 M0 M0 VR Full bandwidth enabled In this power state, the card is expected to operate at its maximum TDP rating. Note: No application is expected to dissipate maximum power from cores and memory simultaneously. Intel ® Xeon Phi Coprocessor Datasheet 54 Document ID Number: 328209 003EN
Figure 5-2. Some cores are in C0-state and other cores in C1-state; Memory in M0-state M0 M0 M0 M0 M0 M0 VR C1 - Halt (clocks gated) C0 (Full on) Fan
Page 1 and 2:
Intel ® Xeon Phi Coprocessor Datas
Page 3 and 4: Table of Contents 1 Introduction...
Page 5 and 6: List of Tables 1-1 Related Document
Page 7 and 8: 1 Introduction 1.1 Reference Docume
Page 9 and 10: 2 Intel ® Xeon Phi Coprocessor Arc
Page 11 and 12: Figure 2-2. Intel® Xeon Phi Coproc
Page 13 and 14: 2.1.4 Intel® Xeon Phi Coprocessor
Page 15 and 16: 3 Thermal and Mechanical Specificat
Page 17 and 18: Figure 3-2 Dimensions of the Intel
Page 19 and 20: Within 50ns of detecting T throttle
Page 21 and 22: 3.3.2 7120P/SE10P/5110P/3120P/31S1P
Page 23 and 24: Figure 3-6 Airflow Requirement vs.
Page 25 and 26: Figure 3-8 Airflow Requirement vs.
Page 27 and 28: Figure 3-10 SE10X/7120X Power Profi
Page 29 and 30: Figure 3-12 5120D Power Profile: Me
Page 31 and 32: Figure 3-14 7120D Power Profile: Me
Page 33 and 34: 3.4.2 Thermal Profile and Cooling T
Page 35 and 36: 3.4.3 Mechanical Considerations •
Page 37 and 38: Figure 3-19 SE10X/7120X Board Botto
Page 39 and 40: Figure 3-21 7120D/5120D Board Botto
Page 41 and 42: 3.5.1 Bracket Installation Steps Fi
Page 43 and 44: 3. Install OEM Bracket. a. Insert t
Page 45 and 46: 4 Intel ® Xeon Phi Coprocessor Pin
Page 47 and 48: 4.2 Supplemental Power Connector(s)
Page 49 and 50: Table 4-2. 5120D (DFF) SKU Pinout B
Page 51 and 52: 4.3.1 Baseboard Requirements of 512
Page 53: 5 Power Specification and Managemen
Page 57 and 58: Figure 5-6. Package-C6 and Memory M
Page 59 and 60: Figure 5-8. Intel ® Xeon Phi copro
Page 61 and 62: 6 Manageability 6.1 Intel ® Xeon P
Page 63 and 64: — P-state clamping if the P-state
Page 65 and 66: The sensors available from the SMC
Page 67 and 68: The SMC supports a read only IPMI S
Page 69 and 70: 6.6.2.4 Read Description Figure 6-2
Page 71 and 72: 6.6.3.6 General Commands Table 6-7.
Page 73 and 74: Table 6-12. Set SM Signal Request F
Page 75 and 76: When the baseboard asserts PROCHOT
Page 77 and 78: Table 6-25. Table of Sensors Sensor
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