The Microcontroller Idea Book - Jan Axelson's Lakeview Research

Chapter 4
Figure 4-4. Pinout for 8K EPROM.
The components continue the numbering sequence begun in Figures 3-1 and 4-4. The
additional circuits for the PROG commands are at pin 1 of U8. Jumper J5 allows you to
configure the memory site for the type of NV memory you’re using.
On NVRAM or EEPROM, pin 1 has no connection (or, on some EEPROMs, it’s a BUSY
output). On the EPROM, it’s VPP, which is +5V during read operations and 12.5V during
programming. PGM EN (pin 6 on the 8052-BASIC) controls the programming voltage by
going low during programming operations and otherwise remaining high.
To prevent accidental programming during power up, OR gate U10A’s output remains high
until RESET goes low. U10 is not an ordinary OR gate—it’s a 75453 peripheral driver. Unlike
ordinary logic gates, U10’s open-collector output can pull up to 30V without damaging the
chip. The output also has much greater current-sinking ability than other logic gates (up to
300mA), and can easily provide base current to drive transistor Q1.
When pin 3 of U10A is high, Q1 is off, and VPP connects to +5V through germanium diode
D2. The diode’s voltage drop is just 0.3V, so VPP is actually at about 4.7V. Intel’s data sheets
specify that read operations require VPP to be at least 3.8V for the 2764A, or VCC-0.7V for
the 27C64, so 4.7V is within the specifications.
58 The Microcontroller Idea Book