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Internet Data Sheet<br />
HY[B/I]18T256[40/80/16]0B[C/F](L)<br />
256-Mbit Double-Data-Rate-Two SDRAM<br />
Abbreviation<br />
I<br />
O<br />
I/O<br />
AI<br />
PWR<br />
GND<br />
NC<br />
Description<br />
Standard input-only ball. Digital levels.<br />
Output. Digital levels.<br />
I/O is a bidirectional input/output signal.<br />
Input. Analog levels.<br />
Power<br />
Ground<br />
Not Connected<br />
TABLE 13<br />
Abbreviations for Ball Type<br />
Abbreviation<br />
SSTL<br />
LV-CMOS<br />
CMOS<br />
OD<br />
Description<br />
TABLE 14<br />
Abbreviations for Buffer Type<br />
Serial Stub Terminated Logic (SSTL_18)<br />
Low Voltage CMOS<br />
CMOS Levels<br />
Open Drain. The corresponding ball has 2 operational states, active low and tristate, and<br />
allows multiple devices to share as a wire-OR.<br />
<strong>Rev</strong>. <strong>1.11</strong>, 2007-07 17<br />
11172006-LBIU-F1TN
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