Carbon Cortex-A9 Model User Guide for SoC Designer

Debug Features 1-17Table 1-8 Normal World Registers (Continued)Name Description TypeN_VBAR [N] Vector Base Address register read-writeN_CONTEXTIDR [N] Context ID register read-writeN_TPIDRURW [N] User Read/Write Thread ID register read-writeN_TPIDRURO [N] User Read Only Thread ID register read-writeN_TPIDRPRW [N] Privileged Only Thread ID register read-write1.5.1.6 Secure World RegistersThe Secure group contains control registers that are only accessible in secure mode. Thisregister is available only with the MPCore.Table 1-9 Secure World RegistersName Description TypeS_CSSELR Cache Size Selection register read-onlyS_SCTLR [S] System Control register read-writeS_TTBR0 [S] TTBR0 register read-writeS_TTBR1 [S] TTBR1 register read-writeS_TTBCR [S] TTBCR register read-writeS_DACR [S] Domain Access Control register read-writeS_DFSR [S] Data Fault Status register read-writeS_IFSR [S] Instruction Fault Status register read-writeS_DFAR [S] Data Fault Address register read-writeS_IFAR [S] Instruction Fault Address register read-writeS_PRRR [S] Primary Region Remap register read-writeS_NMRR [S] Normal Memory Remap register read-writeS_VBAR [S] Vector Base Address register read-writeS_CONTEXTIDR [S] Context ID register read-writeS_TPIDRURW [S] User Read/Write Thread ID register read-writeS_TPIDRURO [S] User Read Only Thread ID register read-writeS_TPIDRPRW [S] Privileged Only Thread ID register read-writeCarbon Design Systems, Inc. Confidential