Carbon Cortex-A9 Model User Guide for SoC Designer

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1-24 Using the Model Kit Component in SoC Designer Plus1.5.2 Run To Debug PointThe “run to debug point” feature has been added to enhance model debugging. The Cortex-A9processor is a dual issue out of order completion machine. This means that whilethe processor is running it does not present a coherent programmer’s view state; instructionsin the pipeline may be in different execution states.This feature forces the processor into a coherent state called “run to debug point”. Whendebugging with the ARM RealView Development Suite (RVDS), the model is brought tothe debug point automatically whenever a software breakpoint is hit (including singlestepping). However, if a hardware breakpoint is reached, or the system is advanced bycycles within SoC Designer Plus, the model can get to a non-debuggable state. In thisevent, the run to debug point will advance the processor to the debug state. It does this bystalling the instruction within the decode stage and allowing all earlier instructions to complete.Once that has been accomplished, the model will cause the system to stop simulating.The run to debug point is available as a context menu item (Run to Debuggable Point) forthe component within SoC Designer Simulator. It is also available in the disassemblerview.1.5.3 Memory InformationFigure 1-4 shows a Memory view of Cortex-A9 model.Figure 1-4 Cortex-A9 Memory ViewCarbon Design Systems, Inc. Confidential
Debug Features 1-251.5.4 Disassembly ViewFigure 1-5 shows the disassembly view of a program running on the Cortex-A9 model inSoC Designer Simulator. To display the disassembly view in the SoC Designer Simulator,right-click on the Cortex-A9 model and select View Disassembly… from the contextmenu.Figure 1-5 Cortex-A9 Disassembly WindowAll CADI windows support breakpoints – when double-clicking on the proper location ared dot will indicate that a breakpoint is currently active. To remove the breakpoints simplydouble-click on the same location again.Carbon Design Systems, Inc. Confidential
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Carbon Cortex-A9 Model User Guide for SoC Designer

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