CS5531/32/33/34 - Eshop-Rychle.cz

CS5531/32/33/34U/B (Unipolar / Bipolar) [22] [6]0 Select Bipolar mode.1 Select Unipolar mode.OL1-OL0 (Output Latch Bits) [21:20] [5:4]The latch bits will be set to the logic state of these bits upon command word execution when the outputlatch select bit (OLS) in the configuration register is logic 0. Note that the logic outputs on the chip arepowered from VA+ and VA-.00 A0 = 0, A1 = 001 A0 = 0, A1 = 110 A0 = 1, A1 = 011 A0 = 1, A1 = 1DT (Delay Time Bit) [19] [3]When set, the converter will wait for a delay time before starting a conversion. This allows settling time forA0 and A1 outputs before a conversion begins. The delay time will be 1280 MCLK cycles when FRS = 0,and 1536 MCLK cycles when FRS = 1.0 Begin Conversions Immediately.1 Wait 1280 MCLK cycles (FRS = 0) or 1536 MCLK cycles (FRS = 1) before starting conversion.OCD (Open Circuit Detect Bit) [18] [2]When set, this bit activates a 300 nA current source on the input channel (AIN+) selected by the channelselect bits. Note that the 300nA current source is rated at 25°C. At -55°C, the current source doubles toapproximately 600nA. This feature is particularly useful in thermocouple applications when the user wantsto drive a suspected open thermocouple lead to a supply rail.0 Normal mode.1 Activate current source.OG1-OG0 (Offset / Gain Register Pointer Bits) [17:16] [1:0]These bits are only used when OGS in the Configuration Register is set to ‘1’. They allow the user to selectthe offset and gain register to use while performing a conversion or calibration. When the OGS bit in theConfiguration Register is set to ‘0’, the offset and gain register for the referenced physical channel (CS1-CS0 bits of the Setup) will be used.00 Use offset and gain register from physical channel 101 Use offset and gain register from physical channel 210 Use offset and gain register from physical channel 311 Use offset and gain register from physical channel 4DS289PP5 31