IBM 5280 Distributed Data System - Index of

Indirect Instruction Execution (lNXEO)Source:INXEO 0-3)Object:DBD Instruction modifier address: The address of the single binary register (BRn),or the leftmost register of a double register (BRn(4)), that contains the dataneeded to modify the instruction.If a single binary register is specified, then the contents of the low-order byteof the 2-byte register are logically ORed with the contents of the specifiedbyte of the instruction.If a double binary register is specified, then the contents of all 4 bytes of theregister are 0 Red with the contents of all 4 bytes of the instruction, exceptthat bits 30 and 31 are ignored.fJ Address bit:0= BRa contains a 16-bit address.1 = BRa(4) contains a 20-bit address of a storage location outside thepartition.II Instruction address: The address of the instruction to modify and execute.D Instruction byte modifier, bits 30 and 31:11 = Modify byte 0 of the instruction (op code)00 = Modify byte 1 of the instruction01 = Modify byte 2 of the instruction10 = Modify byte 3 of the instructionThe specified instruction is modified as indicated, and then the modified instructionis executed. Control then returns to the instruction following the INXEO instructionunless the modified instruction causes a branch. If a skip instruction is modified,and the modified instruction causes a skip, the instruction skipped is theinstruction following the INXEO instruction. The object code of the modifiedinstruction is not changed.If a short branch instruction is modified with INXEO, the displacement is calculatedfrom the INXEO instruction rather than from the branch instruction. No ooditionalvalidity for valid addresses is made with the INXEO instruction.If an INXEO instruction is in the common area, the executed instruction is also inthe common area.Object Code Instruction Format 249