Dependable Memory - Laboratoire Interface Capteurs ...
Dependable Memory - Laboratoire Interface Capteurs ...
Dependable Memory - Laboratoire Interface Capteurs ...
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Chapter 1<br />
Dependability and Fault Tolerance<br />
t is a complex task to design embedded systems for critical real-time applications. Such systems<br />
I<br />
must not only guarantee to meet hard real-time deadlines imposed by their physical environment,<br />
but also guarantee to do so dependably, despite the occurrence of faults [Pow10]. The need of fault<br />
tolerant (FT) computing is becoming more and more important in recent years [Che08] and likely<br />
become the norm. In the past, FT was the exclusive domain of very specialized applications like<br />
safety critical systems. However modern design trends are making circuits more sensitive and now<br />
all real-time systems should have at least some FT features. Therefore, FT is an important need of the<br />
time.<br />
Modern social system is hinged to automated industry. In some sensitive industrial sectors, even a<br />
single fault can result in a million dollar loss (e.g. in banking and stock markets) or can result in loss<br />
of life (e.g. air traffic control system). Industries like automotive, avionics, and energy production re-<br />
quire availability, performance and real-time response ability to avoid catastrophic failures. In table 1,<br />
cost per hour for the failure of the control systems has been compared to show the importance/demand<br />
of FT in the industrial sector.<br />
Table 1.1: Cost/hour for failure of control system [Pie07]<br />
Application Domain Cost (Euro/hour)<br />
Cell-phone Operator 40k<br />
Airline Reservation 90k<br />
ATM Machine (Banking) 2.5M<br />
Automobile Assembling Unit 6M<br />
Stock Transaction 6.5M<br />
Most of these system (in table 1) rely on embedded systems. The design of the FT processor<br />
is one of the basic requirement for dependable embedded applications. Accordingly, we propose to<br />
design a fault tolerant processor to eliminate (tolerate) transient faults that result from SEUs. In this<br />
introductory chapter, we will address the basic concepts and terminologies related to fault tolerant<br />
computing. This chapter is divided into three main parts: the first part will be arguing the current<br />
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