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1.6. TECHNIQUES APPLIED AT DIFFERENT LEVELS 27
Error Correction/Recovery
Detecting an error is sufficient for providing safety, but we would also like the system to recover
from the faulty states. Recovery hides the effects of the error from the user. After recovery, the system
can resume operation and ideally remain live. Error recovery is an important feature for the system
based on the two attributes of reliability and availability because both the metrics require the system
to recover from its errors without user intervention.
Error detection and recovery are addressed in this thesis, they will discussed in detail in the chap-
ter 2. Similarly, various techniques of error detection (in section 2.1) and correction (in section 2.2)
are also discussed.
1.6 Techniques Applied at Different Levels
Figure 1.11 illustrates the dependability techniques applied at different levels in a hardware and
a software system in which fault avoidance (fault prevention) is the primary method to improve the
system dependability. It may be taken into account through hardware or software implementations.
The fault avoidance in a hardware based system can be achieved by preventing specification and
implementation faults, component defects and external disturbances, while in a software based system
it requires prevention of specification and implementation faults. On the other hand, fault masking is
a technique used to ensure dependability, by masking the faults. TMR is a well-known example of
this technique. If fault masking is not applied, then FT is a practical choice to overcome errors.
1.6.1 FT Techniques
Fault tolerant techniques for integrated circuits can be applied at different moments in the circuit
design flow. They can be applied in the electrical design phase, such as transistor dimension, transistor
redundancy and by adding electrical sensors. Some techniques can be added at logic design step, such
as by adding hardware and time redundancy in the logic blocks and in the software application. The
figure 1.12 is the further extension of previous discussed figure 1.2 . The figure represents different
phases to tolerate faults (detect and correct). In each phase a different fault tolerant technique can be
used. We are addressing the fault tolerant at hardware redundancy and self-checking level that are
two higher levels (as shown in ‘c’ and ‘d’ of figure 1.12).
1.7 Conclusions
The goal of this chapter was to introduce the concepts of dependability in embedded systems. In
fulfilling this objective, we have introduced the main issues related to the design and analysis of fault
tolerant systems. Here, we have discussed different types of faults and their characteristics because