THE OCULUS-F/64 FRAME GRABBER User's Manual
THE OCULUS-F/64 FRAME GRABBER User's Manual
THE OCULUS-F/64 FRAME GRABBER User's Manual
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A.1 <strong>OCULUS</strong>-F/<strong>64</strong> CONFIGURATIONS<br />
Oculus F/<strong>64</strong> Acquisition, processing and display with 8 bit frame buffer<br />
Oculus F/<strong>64</strong>-DSP Acquisition, processing, display with 8 bit frame buffer and<br />
high performance DSP<br />
Oculus F/<strong>64</strong>-DSP16 High performance imaging board with DSP and 16 bit<br />
frame buffer<br />
A.2 ACQUISITION<br />
Digitization rate (no IP-Engine<br />
operations)<br />
Digitization rate (with IP-Engine<br />
operations)<br />
F/<strong>64</strong> F/<strong>64</strong>-DSP F/<strong>64</strong>-DSP16<br />
40 MHz 40 MHz 40 Mhz (8 or<br />
16 bit data)<br />
20 MHz 40 MHz 20 Mhz (16<br />
bit data)<br />
Digitization accuracy 8 bits 8 bits 10 bits<br />
Digital input 8 bits 8 bits 12 bits<br />
Input look-up tables 32 x 256<br />
entry<br />
Maximum acquisition resolution 4k x 4k<br />
w/ optional<br />
memory<br />
A.3 SYNCHRONIZATION<br />
Applies to all Oculus-F/<strong>64</strong> Products<br />
32 x 256<br />
entry<br />
32 x 256,<br />
8 x 1024<br />
2 x 4096<br />
4k x 4k 4k x 4k<br />
Pixel clock range 510 kHz to 40 MHz, increments of about 10 kHz<br />
Pixel clock jitter 1/6th pixel worst case<br />
Input signals Hsync, Vsync, trigger, pixel clock, control<br />
Output signals Hsync, Vsync, trigger, pixel clock, control<br />
Coreco Inc., Apendix A <strong>OCULUS</strong>-F/<strong>64</strong> Specifications Page 5-3
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