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mitac 8355.pdf - tim.id.au

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8355 N/B MAINTENANCE<br />

8 or 16-bit control / address / data transfer both directions<br />

800 / 600 / 400 / 200 MHz Double Data Rate operation both directions<br />

Def<strong>au</strong>lt 8-bit / 200 MHz operation on startup for high reliability with speedup to dual 16-bit, 800 MHz operation (3.2<br />

GB/sec total bandw<strong>id</strong>th) under software control (transmit and receive may be different w<strong>id</strong>ths and / or speeds)<br />

Full Featured Accelerated Graphics Port (AGP) 8x Controller<br />

Supports 533 MHz 8x, 266 MHz 4x, and 133 MHz 2x transfer modes for AD and SBA signaling<br />

AGP v3.0 compliant with 8x transfer mode<br />

Pseudo-synchronous with the host CPU bus with op<strong>tim</strong>al skew control<br />

Supports S<strong>id</strong>eBand Addressing (SBA) mode (non-multiplexed address / data)<br />

AGP pipelined split-transaction long-burst transfers up to 1GB/sec<br />

Eight level read request queue<br />

Four level posted-write request queue<br />

Thirty-two level (quadwords) read data FIFO (256 bytes)<br />

Sixteen level (quadwords) write data FIFO (128 bytes)<br />

Intelligent request reordering for maximum AGP bus utilization<br />

Supports Flush/Fence commands<br />

Graphics Address Relocation Table (GART)<br />

One level TLB structure<br />

Sixteen entry fully associative page table<br />

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