CV - Electronic Systems

Efficient 3D-Stacked Wide I/O DRAMs. In Proc. Design, Automation
and Test in Europe Conference and Exhibition (DATE), March 2013.
92. Manil Dev Gomony, Benny Akesson, and Kees Goossens. Architecture and
optimal configuration of a real-time multi-channel memory controller. In
Proc. Design, Automation and Test in Europe Conference and Exhibition
(DATE), March 2013.
93. Sven Goossens, Benny Akesson, and Kees Goossens. Conservative openpage
policy for mixed time-criticality memory controllers. In Proc. Design,
Automation and Test in Europe Conference and Exhibition (DATE),
March 2013.
4.5 Invited publications
1. Paul Wielage and Kees Goossens. Networks on silicon: Blessing or nightmare?
In Euromicro Symposium On Digital System Design, pages 196–
200, Washington, DC, USA, September 2002. IEEE Computer Society.
2. Kees Goossens. Formal methods for networks on chips. In Proc. Int’l
Conference on Application of Concurrency to System Design (ACSD),
pages 188–189, Washington, DC, USA, June 2005. IEEE Computer Society.
3. Miron Abramovici, Neal Stollon, Kees Goossens, Bart Vermeulen, Jack
Greenbaum, and Adam Donlin. You can catch more bugs with transaction
level honey. In Int’l Conf. on Hardware/Software Codesign and System
Synthesis (CODES+ISSS), pages 121–124, New York, NY, USA, October
2008. ACM.
4. Bart Vermeulen and Kees Goossens. A network-on-chip monitoring infrastructure
for communication-centric debug of embedded multi-processor
SoCs. In Proc. Int’l Symposium on VLSI Design, Automation and Test
(VLSI-DAT), pages 183–186, April 2009.
5. Anca Molnos, Jude Angelo Ambrose, Andrew Nelson, Radu Stefan, Sorin
Cotofana, and Kees Goossens. A composable, energy-managed, real-time
MPSOC platform. In Proc. Int’l Conference on Optimization of Electrical
and Electronic Equipment (OPTIM), pages 870–876, May 2010.
6. Bart Vermeulen and Kees Goossens. Obtaining consistent global state
dumps to interactively debug systems on chip with multiple clocks. In
Proc. Workshop on High-Level Design Validation and Test (HLDVT),
pages 1–8, June 2010.
7. Kees Goossens and Andreas Hansson. The Aethereal network on chip
after ten years: Goals, evolution, lessons, and future. In Proc. Design
Automation Conference (DAC), pages 306–311, June 2010.
8. Andrew Nelson, Anca Molnos, and Kees Goossens. Composable power
management with energy and power budgets per application. In Proc.
Int’l Conference on Embedded Computer Systems: Architectures, MOdeling
and Simulation (SAMOS), pages 396–403, July 2011.
9. M. Ferger, M. Al Kadi, M. Hübner, M. Koedam, S. Sinha, K. Goossens,
G. Marchesan Almeida, J. Rodrigo Azambuja, and J. Becker. Hardware
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