CV - Electronic Systems
CV - Electronic Systems
CV - Electronic Systems
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tional interconnects - two case studies. In Giovanni De Micheli, Salvador<br />
Mir, and Ricardo Reis, editors, VLSI-SoC: Research Trends in VLSI and<br />
<strong>Systems</strong> on Chip, volume 249 of IFIP International Federation for Information<br />
Processing, pages 317–336. Springer, 2007.<br />
8. E. Rijpkema, K. G. W. Goossens, A. Rădulescu, J. Dielissen, J. van Meerbergen,<br />
P. Wielage, and E. Waterlander. Trade offs in the design of a<br />
router with both guaranteed and best-effort services for networks on chip.<br />
In Rudy Lauwereins and Jan Madsen, editors, Design Automation, and<br />
Test in Europe. The Most Influential Papers of 10 Years DATE, Circuits<br />
& <strong>Systems</strong>, chapter 2 (Networks on Chip). Springer, January 2008.<br />
9. Bart Vermeulen and Kees Goossens. Debugging multi-core systems on<br />
chip. In George Kornaros, editor, Multi-Core Embedded <strong>Systems</strong>, chapter<br />
5, pages 153–198. CRC Press/Taylor & Francis Group, April 2010.<br />
10. Benny Akesson, Anca Molnos, Andreas Hansson, Jude Ambrose Angelo,<br />
and Kees Goossens. Composability and predictability for independent<br />
application development, verification, and execution. In Michael Hübner<br />
and Jürgen Becker, editors, Multiprocessor System-on-Chip — Hardware<br />
Design and Tool Integration, Circuits and <strong>Systems</strong>, chapter 2, pages 25–56.<br />
Springer, November 2010.<br />
4.3 Journal and Magazine Articles<br />
1. André Nieuwland, Jeffrey Kang, Om Prakash Gangwal, Ramanathan Sethuraman,<br />
Natalino Busá, Kees Goossens, Rafael Peset Llopis, and Paul Lippens.<br />
C-HEAP: A heterogeneous multi-processor architecture template<br />
and scalable and flexible protocol for the design of embedded signal processing<br />
systems. ACM Transactions on Design Automation for Embedded<br />
<strong>Systems</strong>, 7(3):233–270, 2002.<br />
2. E. Rijpkema, K. Goossens, A. Rădulescu, J. Dielissen, J. van Meerbergen,<br />
P. Wielage, and E. Waterlander. Trade-offs in the design of a router with<br />
both guaranteed and best-effort services for networks on chip. IEE Proceedings:<br />
Computers and Digital Techniques, 150(5):294–302, September<br />
2003.<br />
3. Bart Vermeulen, John Dielissen, Kees Goossens, and Călin Ciorda¸s. Bringing<br />
communication networks on chip: Test and verification implications.<br />
IEEE Communications Magazine, 41(9):74–81, September 2003.<br />
4. Andrei Rădulescu, John Dielissen, Santiago González Pestana, Om Prakash<br />
Gangwal, Edwin Rijpkema, Paul Wielage, and Kees Goossens. An efficient<br />
on-chip network interface offering guaranteed services, shared-memory abstraction,<br />
and flexible network programming. IEEE Transactions on CAD<br />
of Integrated Circuits and <strong>Systems</strong>, 24(1):4–17, January 2005.<br />
5. Kees Goossens, John Dielissen, and Andrei Rădulescu. The Æthereal<br />
network on chip: Concepts, architectures, and implementations. IEEE<br />
Design and Test of Computers, 22(5):414–421, Sept-Oct 2005.<br />
6. Călin Ciorda¸s, Twan Basten, Andrei Rădulescu, Kees Goossens, and Jef<br />
van Meerbergen. An event-based monitoring service for networks on<br />
6