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Science, University of Edinburgh, Scotland on the SERC-funded project Formal System Design Tools. 1 October 1993 to 31 March 1994 Full-time appointment as a visiting researcher at the Departamento de Informatica, Universidade Federal de Pernambuco at Recife, Brazil on the CNPq-funded project Encoding Relational Semantics in Automated Proof Systems. 1 May 1994 to 31 May 1995 Full-time appointment as a visiting researcher on the EEC-funded Human Capital and Mobility project Euroform at the Dipartimento di Scienze dell’Informazione, Università di Roma “La Sapienza,” Italy and at the Departimento di Automatica e Informatica, Politecnico di Torino, Italy. I developed formal operational and observational semantics for VHDL inspired by process calculi. 16 September 1995 to 31 December 2009 Full-time appointment as senior research scientist, at the Natuurkundig Laboratorium, Philips Research Laboratories in the Netherlands. As of 1 March 2004, full-time appointment as principal research scientist. 1 February 2007 to 31 December 2009 Three-year appointment as a part-time (0.2 FTE) full professor (“buitengewoon hoogleraar”) in VLSI Design at the Computer Engineering (CE) division within the Electrical Engineering, Mathematics and Computer Science (EEMCS) faculty of the Delft University of Technology. 1 January 2010 to present Full-time full professor in Real-Time Embedded Systems in the Electronics Systems group within the Electrical Engineering faculty of the Eindhoven University of Technology. 1 January 2012 to present Part-time consultant with K.G.W. Goossens Consultancy. 4 Publications 4.1 Thesis and (Edited) Books 1. Kees G. W. Goossens. Embedding Hardware Description Languages in Proof Systems. PhD thesis, Laboratory for Foundations of Computer Science, Department of Computer Science, University of Edinburgh, May 1993. 2. Kees Goossens and Laure Petrucci, editors. Sixth International Conference on Applications of Concurrency to System Design (ACSD), Turku, Finland, June 2006. IEEE. 4
3. Koen Bertels, Sorin Cotofana, Georgi N. Gaydadjiev, Kees Goossens, Said Hamdioui, Arjan van Genderen, and Stephan Wong, editors. The Future of Computing — Essays in Memory of Stamatis Vassiliadis. September 2007. 4. Andreas Hansson and Kees Goossens. On-Chip Interconnect with aelite: Composable and Predictable Systems. Embedded Systems Series. Springer, November 2010. 5. Benny Akesson and Kees Goossens. Memory Controllers for Real-Time Embedded Systems. Embedded Systems Series. Springer, September 2011. 4.2 Book Chapters 1. Kees Goossens, John Dielissen, Jef van Meerbergen, Peter Poplavko, Andrei Rădulescu, Edwin Rijpkema, Erwin Waterlander, and Paul Wielage. Guaranteeing the quality of services in networks on chip. In Axel Jantsch and Hannu Tenhunen, editors, Networks on Chip, chapter 4, pages 61–82. Kluwer Academic Publishers, Hingham, MA, USA, 2003. 2. Andrei Rădulescu and Kees Goossens. Communication services for networks on chip. In Shuvra S. Bhattacharyya, Ed F. Deprettere, and Jürgen Teich, editors, Domain-Specific Processors: Systems, Architectures, Modeling, and Simulation, pages 193–213. Marcel Dekker, 2004. 3. Kees Goossens, Om Prakash Gangwal, Jens Röver, and A. P. Niranjan. Interconnect and memory organization in SOCs for advanced set-top boxes and TV — Evolution, analysis, and trends. In Jari Nurmi, Hannu Tenhunen, Jouni Isoaho, and Axel Jantsch, editors, Interconnect-Centric Design for Advanced SoC and NoC, chapter 15, pages 399–423. Kluwer, 2004. 4. Kees Goossens, Santiago González Pestana, John Dielissen, Om Prakash Gangwal, Jef van Meerbergen, Andrei Rădulescu, Edwin Rijpkema, and Paul Wielage. Service-based design of systems on chip and networks on chip. In Peter van der Stok, editor, Dynamic and Robust Streaming In And Between Connected Consumer-Electronics Devices, volume 3 of Philips Research Book Series, chapter 2, pages 37–60. Springer, 2005. 5. Om Prakash Gangwal, Andrei Rădulescu, Kees Goossens, Santiago González Pestana, and Edwin Rijpkema. Building predictable systems on chip: An analysis of guaranteed communication in the Æthereal network on chip. In Peter van der Stok, editor, Dynamic and Robust Streaming In And Between Connected Consumer-Electronics Devices, volume 3 of Philips Research Book Series, chapter 1, pages 1–36. Springer, 2005. 6. Israel Cidon and Kees Goossens. Network and transport layers in networks on chip. In Giovanni De Micheli and Luca Benini, editors, Networks on Chips: Technology and Tools, The Morgan Kaufmann Series in Systems on Silicon, chapter 5, pages 147–202. Morgan Kaufmann, July 2006. 7. Arno Moonen, Chris Bartels, Marco Bekooij, René van den Berg, Harpreet Bhullar, Kees Goossens, Patrick Groeneveld, Jos Huiskens, and Jef van Meerbergen. Comparison of an Aethereal network on chip and tradi- 5
Page 1 and 2: Curriculum Vitae of Kees Goossens 1
Page 3: 2 Education 1978 to 1984 Secondary
Page 7 and 8: chip. ACM Transactions on Design Au
Page 9 and 10: 8. K. G. W. Goossens. A protocol an
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Page 15 and 16: 309-318. IEEE Computer Society, Aug
Page 17 and 18: Efficient 3D-Stacked Wide I/O DRAMs
Page 19 and 20: 8. Andreas Hansson, Maarten Wiggers
Page 21 and 22: Communication of slack availability
Page 23 and 24: 6. P. Lippens, Z. Chamski, B. Kastr
Page 25 and 26: 5 Patents 5.1 Granted patents Note
Page 27 and 28: 10. WO2006117746(A1), EP0715261(A1)
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Page 37 and 38: 7. Asadollah Shahbahrami “Avoidin
Page 39 and 40: 9. Jun Zhu, post-doc 7.4 PhD Adviso
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Page 43 and 44: 10. Wouter Loeffen “Automated Gen

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