Download complete software manual (PDF-File) - esd electronics, Inc.
Download complete software manual (PDF-File) - esd electronics, Inc.
Download complete software manual (PDF-File) - esd electronics, Inc.
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ip<br />
tp (sample)<br />
ar<br />
wr<br />
op<br />
$FFFF<br />
Further not shown pramaters:<br />
opol = 0<br />
tedg = 2<br />
gp = 0<br />
Fig. 4.3.9: Timing examples for FRS operation<br />
Pulse Processing Mode<br />
The register wr is counted up (with mode = 8) or down (with mode = 108) via the input cycle<br />
(ip).<br />
The value of wr is taken over into the auxiliary register via the sample pulse (tp).<br />
The output pin (op) is set at the overflow of register wr.<br />
VME DPIO32 Software Manual Rev. 2.1 43