Download complete software manual (PDF-File) - esd electronics, Inc.
Download complete software manual (PDF-File) - esd electronics, Inc.
Download complete software manual (PDF-File) - esd electronics, Inc.
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ip<br />
gp<br />
ar<br />
wr<br />
op<br />
Further parameters not shown:<br />
opol = 0<br />
tp = 0<br />
Fig. 4.3.13: Timing example for GTC operation<br />
Pulse Processing Mode<br />
Following the falling edge of the gate signal (gp) the register wr is reset and counted up (with mode<br />
= 12) or down (with mode = 112) via the input cycle (ip). The falling edge stops the counting<br />
process.<br />
If the value of the register wr reaches the value of the register ar, the output signal (op) is activated.<br />
VME DPIO32 Software Manual Rev. 2.1 51<br />
wr<br />
ar