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14 Chapter 2: Nonlinearity at the ADC’s Front-End 2.3 Nonlinearity at the acquisition stage The track-and-hold stage used for sampling at the front-end is a significant source of nonlinearity in the ADC’s transfer function. The two main sources of errors at this stage are input-dependent charge injection and tracking nonlinearity due to the impedance modulation of the sampling switches. These two sources of nonlinearity cause the real output voltage to differ from the ideal V out with some error during both tracking and the hold mode, as shown in Figure 2.9 [22]. These effects will be further explained in the following sections. Clk V out Ideal V out V in V in + - Real V out Figure 2.9: Ideal and real output of a track-and-hold stage during tracking and hold phases. 2.3.1 Input dependent charge injection In the simple track-and-hold circuit shown in Figure 2.10, the sampling switch is on during tracking mode and V out is tracking the input voltage. When the switch turns off to transition to the hold mode, the output voltage should ideally sample the final
Chapter 2: Nonlinearity at the ADC’s Front-End 15 value of the input during tracking mode and hold it constant as shown in Figure 2.9. However, due to the charge injected to the sampling capacitor during the transition, the real output voltage adds some error to the sampled value of the input voltage (see Figure 2.9). This charge injection comes from the MOS switch and is related to the charge on the overlap capacitance in the switch and also the charge stored in the transistor channel. Figure 2.10: Charge injection in a track-and-hold circuit. During transition from track mode to hold mode, the clock signal changes from Φ h to Φ L (see Figure 2.10). This voltage drop changes the charge on the overlap capacitor and injects Q ov defined with the following equation to the sampling capacitor Q ov CovCs = ( Φ ) H − ΦL (2.1) C + C ov s This error mechanism is called the clock feedthrough and affects the sampled value by injecting the above charge to the sampling capacitor. However, this charge is independent of the input voltage and hence only causes a constant offset on the sampled voltage which can be cancelled in a differential architecture.
Page 1 and 2: DIGITAL COMPENSATION OF DYNAMIC ACQ
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Page 6 and 7: apply the inverse nonlinear functio
Page 8 and 9: Dr. Echere Iroaga, Dr. Yangjin Oh,
Page 10 and 11: Table of Contents Abstract.........
Page 12 and 13: 4.3.3 Algorithm performance on diff
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Page 27 and 28: Chapter 2 Nonlinearity at the ADC
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Chapter 4 Experimental Results In t
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Chapter 4: Experimental Results 67
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Chapter 5 Impact of Substrate Noise
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Chapter 5: Impact of Substrate Nois
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Chapter 6 Conclusion 6.1 Summary IF
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Chapter 6: Conclusion 95 very sensi
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Chapter 6: Conclusion 97 the desire
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Appendix A TCAD Simulation of a Tra
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Appendix A: TCAD Simulation of Trac
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Appendix A: TCAD Simulation of Trac
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Appendix B Modeling Signal Derivati
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Appendix B: Modeling Signal Derivat
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Appendix C Coefficient Calibration
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Appendix C: Coefficient Calibration
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Bibliography [1] A.M.A. Ali et al.,
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Bibliography 115 [23] J. Kuo, R. Du
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Bibliography 117 [46] F. H. Irons,
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Bibliography 119 [68] B. Razavi, B.
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