digital compensation of dynamic acquisition errors at the front-end of ...

20 Chapter 2: Nonlinearity at the ADC’s Front-End
Deviation from the straight line (Q)
6
4
2
0
-2
-4
0 0.2 0.4 0.6 0.8 1
8 x V in
(V)
Figure 2.14: Deviation from a straight line in the plot of charge injection vs. input
voltage. Total charge is defined as the charge on the capacitor at full
scale, Q total =2pF×1V=2e -12 C.
⎛ Q
Charge Linearity
⎟ ⎞
error
= −20 × log
⎜
(2.3)
⎝ Qtotal
⎠
where Q error is the deviation of the charge injection plot from the straight line and Q total
is the total charge on the capacitor (see Figure 2.14).
Figure 2.15 includes several plots showing the linearity performance of (2.3),
defined for the bottom-plate track-and-hold circuit, versus different circuit parameters.
Figure 2.15(a) shows the charge linearity performance vs. size of the bottom transistor
(W 2 ). It can be observed from this figure that nonlinearity due to charge injection is
reduced by reducing size of the bottom transistor. This is due to the fact that a smaller
switch provides less charge injection. Figure 2.15(b) shows that linearity is improving
with increasing size of the top switch, M 1 . Using a larger switch size reduces the
nonlinear section of the impedance seen at the drain of M 2 and hence reduces the
nonlinear part of the charge injection. Figure 2.15(c) also shows that linearity