digital compensation of dynamic acquisition errors at the front-end of ...

24 Chapter 2: Nonlinearity at the ADC’s Front-End
Figure 2.17 shows SFDR of the bottom-plate track-and-hold circuit vs. input
frequency obtained from AC TCAD simulations (see Appendix A). In this figure,
SFDR degradations from the two main sources of nonlinearity in the above circuit
have been separated. In order to differentiate the two sources of nonlinearities in
simulation, capacitor charge was measured at the end of the tracking phase (to model
tracking error) and after M 2 turn off (to model charge injection). It can be observed
from this figure that SFDR is mainly dominated by charge injection errors at low input
frequencies and the tracking error becomes the main source of SFDR degradation at
high input frequencies. Although both of these errors have dynamic effects, the charge
injection error has mostly a static nature and does not change considerably with input
frequency. Since the linearity of this stage is most important at high input frequencies,
we will mainly focus on modeling and compensation of the tracking nonlinearity in
the remainder of this dissertation. In the next section we investigate tracking
nonlinearity in more detail in order to find a compact model that can be used for
digital correction.
SFDR (dB)
160
140
120
100
80
60
40
20
0
SFDR of the sampling block
SFDR due to charge injection
SFDR due to tracking error
10 1
Input frequency (MHz)
Figure 2.17: SFDR of the bottom-plate track-and-hold vs. input frequency obtained
from AC TCAD simulations.