Digital Subscriber Line Access Multiplexer (DSLAM) Example Design
Digital Subscriber Line Access Multiplexer (DSLAM) Example Design
Digital Subscriber Line Access Multiplexer (DSLAM) Example Design
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<strong>Digital</strong> <strong>Subscriber</strong> <strong>Line</strong> <strong>Access</strong> <strong>Multiplexer</strong> (<strong>DSLAM</strong>) <strong>Example</strong> <strong>Design</strong><br />
3.5 Transmit Processor Traffic Shaper<br />
The TM4.1_Shaper function reads a single entry in the calendar queue. Each entry has room to<br />
contain a must-send VC index (associated with a VC configured as CBR @ PCR or VBR-rt @<br />
SCR), a could-send VC index (associated with a VC configured as VBR-rt @ PCR or VBR-nrt<br />
@SCR) and an unshaped VC index (associated with a VC configured as VBR-nrt @ PCR or<br />
UBR). The VC indices that will be processed at any given time are prioritized in the order as they<br />
appear - must-send/could-send/unshaped. If multiple VC indices are present in an entry, the VC<br />
index with the highest priority gets processed. All other VC indices are re-scheduled without<br />
transmitting a cell on such VCs. After transmitting a cell, the next cell in that VC’s queue will be<br />
requested to be scheduled. If a VP/VC index is not found in an entry, the shaper will wait for the<br />
duration (inter-cell gap + time it takes to process a cell for a given bandwidth).<br />
3.6 Transmit Processor Traffic Transmit<br />
The ATM transmit function is passed a VC index and port number. If the VC index indicates to do<br />
a port skip (no data for the port is available to be transmitted) then a port skip is done and the<br />
transmit buffer element is updated for the next cell. If flow control is asserted for the port, then a<br />
port skip is done and the transmit buffer element is updated for the next cell. A packet is de-queued<br />
from the VC queue. The packet descriptor is then read. The fabric and cell header is generated and<br />
put into the transmit buffer. The CRC is run on the packet data for this cell and put into the transmit<br />
buffer. If this is the last cell, then the packet trailer is generated and also put into the transmit buffer.<br />
The packet is then transmitted and the transmit buffer element is updated for the next cell.<br />
Next, a check is made with the number of cells en-queued for the VC and the lower queue<br />
threshold for that VC. If they are equal or the cells en-queued is less than the said threshold, a flow<br />
control message is sent onto the ready bus indicating to de-assert flow control. The number of cells<br />
en-queued is then decremented. If this is the last cell of a packet, the packet buffer is put back onto<br />
the free list of packet buffers.<br />
4.0 Data and Tables<br />
4.1 Receive Processor<br />
4.1.1 Input Data<br />
This section describes data input to and output from the Receive Processor in the <strong>DSLAM</strong><br />
<strong>Example</strong> <strong>Design</strong>.<br />
Two types of packets may be input to the Receive Processor:<br />
• Data Packets<br />
• Flow Control Packets<br />
Data packets consist of RFC1483-compliant AAL5 PDUs which have been segmented into ATM<br />
cells and prepended with a custom header.<br />
22 Application Note
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