Digital Subscriber Line Access Multiplexer (DSLAM) Example Design
Digital Subscriber Line Access Multiplexer (DSLAM) Example Design
Digital Subscriber Line Access Multiplexer (DSLAM) Example Design
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<strong>Digital</strong> <strong>Subscriber</strong> <strong>Line</strong> <strong>Access</strong> <strong>Multiplexer</strong> (<strong>DSLAM</strong>) <strong>Example</strong> <strong>Design</strong><br />
Figure 11 shows how bridged Ethernet packets are encapsulated with LLC/SNAP and AAL5 to be<br />
carried by ATM cells. These ATM cells are then prepended with the custom <strong>DSLAM</strong> header by the<br />
DSL Aggregator. The ATM cells with the prepended <strong>DSLAM</strong> headers are then input to the Receive<br />
Processor.<br />
Figure 11. Receive Processor Input - Bridged Ethernet over ATM with <strong>DSLAM</strong> Headers<br />
Ethernet<br />
Data<br />
Ethernet Header<br />
IP Header<br />
TCP Header<br />
Payload<br />
Ethernet Trailer<br />
LLC/SNAP<br />
Encapsulation<br />
LLC OUI PID Partial Ethernet<br />
3 bytes 3 bytes 2 bytes<br />
Header<br />
IP Header<br />
TCP<br />
Header<br />
Payload<br />
Ethernet<br />
Trailer<br />
AAL5<br />
CS<br />
CS-SDU Info Field<br />
Padding<br />
0-47 bytes<br />
UU<br />
1 byte<br />
CPI<br />
1 byte<br />
Length<br />
2 bytes<br />
CRC<br />
4 bytes<br />
SAR<br />
Sub-Layer<br />
ATM Cell<br />
Header<br />
Payload<br />
48 bytes<br />
ATM Cell<br />
Header<br />
Payload<br />
48 bytes<br />
ATM Cell<br />
Header<br />
Payload<br />
48 bytes<br />
<strong>DSLAM</strong><br />
(input to<br />
Processor A)<br />
<strong>DSLAM</strong> Header<br />
4 bytes<br />
ATM Cell<br />
53 bytes<br />
<strong>DSLAM</strong> Header<br />
4 bytes<br />
ATM Cell<br />
53 bytes<br />
Packet Type<br />
1 bit<br />
1=data<br />
Unused<br />
18 bits<br />
Physical Port Number<br />
11 bits<br />
(0-2047)<br />
Physical Port Type<br />
2 bits<br />
1=ATM<br />
A9554-01<br />
Application Note 25
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