Digital Subscriber Line Access Multiplexer (DSLAM) Example Design

Contents
Contents
1.0 Introduction ...............................................................................................................................5
1.1 Purpose of DSLAM Example Design....................................................................................5
1.2 Scope of Example Design ....................................................................................................5
1.3 Execution Environment.........................................................................................................6
1.3.1 Software...................................................................................................................6
1.3.2 Hardware .................................................................................................................6
2.0 System Overview.....................................................................................................................7
2.1 Software Partitioning.............................................................................................................8
2.2 Dual Chip Data Flow...........................................................................................................10
2.3 StrongARM Core Initialization.............................................................................................13
2.4 Microengine Initialization ....................................................................................................13
3.0 Microengine Functional Blocks.......................................................................................14
3.1 Receive Microblock Group..................................................................................................14
3.1.1 Initialization Microblock..........................................................................................15
3.1.2 Ingress Microblock.................................................................................................15
3.1.3 Transform Microblock ............................................................................................16
3.1.4 Egress Microblock .................................................................................................17
3.2 Receive Processor Transmit Microblock Group .................................................................19
3.3 Transmit Processor Receive Microblock Group .................................................................20
3.3.1 Initialization Microblock..........................................................................................20
3.3.2 Ingress Microblock.................................................................................................20
3.3.3 Transform Microblocks...........................................................................................21
3.3.4 Egress Microblock .................................................................................................21
3.4 Transmit Processor Traffic Scheduler ................................................................................21
3.5 Transmit Processor Traffic Shaper .....................................................................................22
3.6 Transmit Processor Traffic Transmit...................................................................................22
4.0 Data and Tables......................................................................................................................22
4.1 Receive Processor..............................................................................................................22
4.1.1 Input Data ..............................................................................................................22
4.1.2 Output Data ...........................................................................................................26
4.2 Transmit Processor.............................................................................................................28
4.2.1 Input Data ..............................................................................................................28
4.2.2 Output Data ...........................................................................................................29
4.3 Connection, Routing, and Hash Tables ..............................................................................29
4.3.1 Rate Manager ........................................................................................................30
4.3.1.1 Port Table Entry .....................................................................................30
4.3.1.2 VC Table Entry.......................................................................................31
5.0 Project Configuration / Modifying the Example Design ........................................32
6.0 Testing Environment............................................................................................................32
7.0 Simulation Support (Scripts, etc.) ..................................................................................32
7.1 Simulation for the Receive Processor Project ....................................................................32
Application Note