PC Architecture. A book by Michael B. Karbo

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Cache A temporary storage, a buffer. Chipset A collection of one or more controllers. Many of the motherboard’s controllers are gathered together into a chipset, which is normally made up of a north bridge and a south bridge. Controller A circuit which controls one or more hardware components. The controller is often part of the interface. Hubs This expression is often used in relation to chipset design, where the two north and south bridge controllers are called hubs in modern design. Interface A system which can transfer data from one component (or subsystem) to another. An interface connects two components (e.g. a hard disk and a motherboard). Interfaces are responsible for the exchange of data between two components. At the physical level they consist of both software and hardware elements. I/O units Components like mice, keyboards, serial and parallel ports, screens, network and other cards, along with USB, firewire and SCSI controllers, etc. Clock frequency Clock tick (or clock cycle) The rate at which data is transferred, which varies quite a lot between the various components of the PC. Usually measured in MHz. A single clock tick is the smallest measure in the working cycle. A working cycle (e.g. the transport of a portion of data) can be executed over a period of about 5 clock ticks (it “costs” 5 clock cycles). Logic An expression I use to refer to software built into chips and controllers. E.g. an EIDE controller has its own “logic”, and the motherboard’s BIOS is “logic”. MHz (Megahertz) A ”speed” which is used to indicate clock frequency. It really means: million cycles per second. The more MHZ, the more data operations can be performed per second. North bridge A chip on the motherboard which serves as a controller for the data traffic close to the CPU. It interfaces with the CPU through the Front Side Bus (FSB) and with the memory through the memory bus. Protocols Electronic traffic rules which regulate the flow of data between two components or systems. Protocols form part of interfaces. South bridge A chip on the motherboard which works together with the north bridge. It looks after the data traffic which is remote from the CPU (I/ O traffic). Fig. 13. These central concepts will be used again and again. See also the definitions on page PAGEREF Ordforklaringer2 \h 95.
Copyright Michael Karbo and ELI Aps., Denmark, Europe. ● Next chapter. ● Previous chapter. Chapter 3. A data processor The PC is a digital data processor. In practise this means that all analogue data (text, sound, pictures) gets translated into masses of 0’s and 1’s. These numbers (binary values) exist as tiny electrical charges in microscopic circuits, where a transistor can take on two states: charged or not charged. This is one picture of a bit, which you can say is either turned on or off. There can be billions of these microscopic bits hidden inside a PC, and they are all managed using electronic circuits (EDP stands for electronic data processing). For example, the letter ”A” (like all other characters) can be represented by a particular 8-digit bit pattern. For ”A”, this 8-digit bit pattern is 01000001. When you type an ”A” on your keyboard, you create the digital data sequence, 01000001. To put it simply, the ”A” exists as a pattern in eight transistors, where some are “turned on” (charged) and others are not. Together these 8 transistors make up one byte. The same set of data can be stored in the video card’s electronics, in RAM or even as a magnetic pattern on your hard disk: Fig. 14. The same data can be found on the screen, on the hard disk and in RAM. The set of data can also be transferred to a printer, if you want to print out your text. The printer electronically and mechanically translates the individual bits into analogue letters and numbers which are printed on the paper. In this way, there are billions of bytes constantly circulating in your PC, while ever it is switched on. But how are these 0’s and 1’s moved around, and which components are responsible? The physical PC The PC is made up of a central unit (also called a system unit) and some external devices. The central unit is a box (a cabinet), which contains most of the computer’s electronics (the internal devices). The external devices are connected to the central unit (shown below) using cables.
Page 1 and 2: PC Architecture - a book by Michael
Page 3 and 4: ● Next chapter. ● Previous chap
Page 5 and 6: Copyright Michael Karbo , Denmark,
Page 7 and 8: IBM-compatible PCs, and as the year
Page 9 and 10: 8 bit 8080 Small CP/M based home co
Page 11 and 12: In the winter of 1939 Atanasoff was
Page 13 and 14: Copyright Michael Karbo and ELI Aps
Page 15: Fig. 12. Cray supercomputer, 1976.
Page 19 and 20: Internal devices External devices M
Page 21 and 22: Fig. 21. Underneath the hard disk y
Page 23 and 24: Fig. 24. The motherboard is the hub
Page 25 and 26: Fig. 27. Here you can see three (wh
Page 27 and 28: Fig. 31. At the bottom left, you ca
Page 29 and 30: ● Higher clock frequencies (which
Page 31 and 32: Which CPU? Fig. 35. The underside o
Page 33 and 34: Fig. 38. A CPU is shown here withou
Page 35 and 36: Fig. 39. If you are not sure which
Page 39 and 40: Fig. 44. The two chips which make u
Page 43 and 44: Sound facilities in a chipset canno
Page 45 and 46: ● Other network, screen and sound
Page 47 and 48: Fig. 54. The CPU’s working speed
Page 51 and 52: Less power consumption The types of
Page 53 and 54: 1993 Pentium 0.8/0.5/0.35 microns 1
Page 55 and 56: Fig. 67. The latest generations of
Page 57 and 58: Fig. 68. Cache RAM is much faster t
Page 61 and 62: AMD Athlon 64 64 bits 2200 MHz 17,6
Page 63 and 64: Fig. 78. The WCPUID program reports
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As the years have passed, changes h
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The pipeline is like a reverse asse
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Motorola G4 4 500 MHz Motorola G4e
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Fig. 91. In the Pentium 4, the inst
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Fig. 92. Re-writing numbers in floa
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will become. ● Improvements to th
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point numbers with just one instruc
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The first PC’s were 16-bit machin
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another in all later generations of
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Fig. 105. L2 cache running at half
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Fig. 108. Extreme CPU cooling using
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Copyright Michael Karbo and ELI Aps
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Figur 112. The LGA 775 socket for P
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Figur 114. In the Athlon 64 the mem
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Figur 116. There are scores of diff
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present, CPU’s and motherboards h
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Fig. 119. With this architecture, t
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Figur 124. A gigantic cooler with t
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Module or chip size All RAM modules
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Fig. 135. Older RAM modules. FPM RA
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In the beginning the problem with D
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However, RAM also has to match the
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Modern motherboards for desktop use
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The new architecture is used for bo
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Figur 148. Report from the freeware
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Fig. 150. In reality, the RAM needs
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Fig. 152. The data path to the vide
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Texture cache and RAMDAC Textures a
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opportunities for extension really
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Clock freq. 66 - 1066 MHz Typically
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Figur 162. The features in this mot
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Fig. 168. ISA based Sound Blaster s
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As a result of all this, the periph
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Fig. 174. Using the CMOS setup prog
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Figure 44. The two chips which make
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Figure 47. The chipset’s south br
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Figure 51. This PC has two sound ca
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You will most likely want to have t
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The trend is towards ever increasin
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A grand new world … We can expect
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here. Wafers and die size Another C
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Figure 69. A cache increases the CP
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Celeron (later gen.), Pentium III,
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Athlon 64 128 KB 512 KB Athlon 64 F
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Xeon processors are incredibly expe
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You can no doubt see that it wouldn
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Intel Pentium 4 (first generation)
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Figure 90. The passage of instructi
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AMD’s 32 bit Athlon line can bare
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FPU - the number cruncher Floating
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for 32-bit integers, and one for 80
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Figure 101. Two 486’s from two di
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Figure 105. L2 cache running at hal
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As was mentioned earlier, the older
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Figur 112. The LGA 775 socket for P
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The Opteron is the most expensive a
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Figure 120. The bus system for an 8
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Figure 123. Setting the CPU voltage
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Figure 129. A 512 MB DDR RAM module
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DDR2-400 400 MHz DDR2 RAM DDR2-533
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Figure 137. The motherboard BIOS ca
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Of course you want to choose the be
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Under the Processes tab, you can se
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Figure 147. The architecture surrou
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Figure 149. The new chipset archite
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At the same time, the PCI system is
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Figure 156. The black PCI Express X
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Figure 157. The south bridge connec
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● The MCI, EISA and VL buses - fa
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Figure 164. The ATA interface works
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The ISA bus is thus the I/O bus whi
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MCA from 1987 Advanced I/O bus from
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Figure 172. The PCI bus is being re
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Figure 174. Using the CMOS setup pr
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Figure 178. The keyboard controller
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IRQ’s. It didn’t take much befo
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Memory-mapped I/O All devices, adap
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Figure 188. Here is the Audigy card
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Finally, I will look at the FireWir
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The super I/O controller is connect
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Figure 196. In the middle you see t
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Figure 200. The UART controller rep
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number of different SCSI standards.
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Figur 205. SCSI hard disks anno 200
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Figure 207. A USB-based trackball -
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USB has thus made the serial ports
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Figure 211. In the middle of the pi
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Figure 213. An SATA-hard disk (here
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from the disk. This magnetism will
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In the ”old days”, interfaces s
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Figure 220. This motherboard has an
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Figure 224. Jumper to change betwee
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Figure 228. An ATA-RAID controller
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The existing PATA system has a limi
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CMOS and Setup The startup program
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Figure 237. Standard CMOS Features
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Figure 239. Advanced Chipset Featur
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Figure 241. The system information
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have seen, in the ROM circuits on t
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To perform an upgrade you first dow
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DMA. Direct Memory Access. A system
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PC Architecture. A book by Michael B. Karbo

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