PC Architecture. A book by Michael B. Karbo

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Figure 152. The data path to the video card before the AGP standard. AGP AGP (Accelerated Graphics Port) is a special I/O port which is designed exclusively for video cards. AGP was developed by Intel. The AGP port is located close to the chipset’s north bridge. Figure 153. The AGP slot can be seen on this motherboard, left of the three PCI slots. The video card port was moved from the south to the north bridge. The new architecture gives optimal access to RAM and hence to the bandwidth which the 3D games require.
At the same time, the PCI system is spared from the large amount of graphic data traffic to and from the video card. It can now focus on the other intensive transfer tasks, such as transfer to and from the network adapter and disk drive. Figure 154. AGP Video card from ATI. Technical details AGP consists of a number of different technical elements, of which I will highlight two: ● A bus structure built around a double-clocked PCI bus. ● The ability to use the motherboard RAM as a texture cache. The texture cache is used by games, and by giving access to the motherboard RAM, less RAM is needed on the cards. The AGP bus is actually a 64-bit variant of the PCI bus. You can also see that on the surface, the motherboard AGP slot looks a fair bit like a PCI slot. But it is placed in a different position on the motherboard, to avoid confusion (see Fig. 156). The slot also has a different colour. The first version of AGP was 1X, with a bandwidth of 254 MB/sec. But AGP was quickly released in a new mode, called 2X, with 508 MB/sec. Later came 4X and 8X, which are the standards today. This involves a clock doubling, just as we have seen, for example, with DDR RAM. Two or four data packets are sent for each clock pulse. In this way, a bandwidth of 2,032 MB/sec has been reached. Texture cache and RAMDAC
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PC Architecture - a book by Michael
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● Next chapter. ● Previous chap
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Copyright Michael Karbo , Denmark,
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IBM-compatible PCs, and as the year
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8 bit 8080 Small CP/M based home co
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In the winter of 1939 Atanasoff was
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Copyright Michael Karbo and ELI Aps
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Fig. 12. Cray supercomputer, 1976.
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Internal devices External devices M
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Fig. 21. Underneath the hard disk y
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Fig. 24. The motherboard is the hub
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Fig. 27. Here you can see three (wh
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Fig. 31. At the bottom left, you ca
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● Higher clock frequencies (which
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Which CPU? Fig. 35. The underside o
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Fig. 38. A CPU is shown here withou
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Fig. 39. If you are not sure which
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Fig. 44. The two chips which make u
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Sound facilities in a chipset canno
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● Other network, screen and sound
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Fig. 54. The CPU’s working speed
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Less power consumption The types of
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1993 Pentium 0.8/0.5/0.35 microns 1
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Fig. 67. The latest generations of
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Fig. 68. Cache RAM is much faster t
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AMD Athlon 64 64 bits 2200 MHz 17,6
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Fig. 78. The WCPUID program reports
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As the years have passed, changes h
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The pipeline is like a reverse asse
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Motorola G4 4 500 MHz Motorola G4e
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Fig. 91. In the Pentium 4, the inst
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Fig. 92. Re-writing numbers in floa
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will become. ● Improvements to th
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point numbers with just one instruc
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The first PC’s were 16-bit machin
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another in all later generations of
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Fig. 105. L2 cache running at half
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Fig. 108. Extreme CPU cooling using
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Figur 112. The LGA 775 socket for P
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Figur 114. In the Athlon 64 the mem
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Figur 116. There are scores of diff
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present, CPU’s and motherboards h
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Fig. 119. With this architecture, t
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Figur 124. A gigantic cooler with t
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Module or chip size All RAM modules
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Fig. 135. Older RAM modules. FPM RA
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In the beginning the problem with D
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However, RAM also has to match the
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Modern motherboards for desktop use
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The new architecture is used for bo
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Figur 148. Report from the freeware
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Fig. 150. In reality, the RAM needs
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Fig. 152. The data path to the vide
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Texture cache and RAMDAC Textures a
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opportunities for extension really
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Clock freq. 66 - 1066 MHz Typically
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Figur 162. The features in this mot
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Fig. 168. ISA based Sound Blaster s
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As a result of all this, the periph
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Fig. 174. Using the CMOS setup prog
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Figure 44. The two chips which make
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Figure 47. The chipset’s south br
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Figure 51. This PC has two sound ca
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You will most likely want to have t
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The trend is towards ever increasin
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A grand new world … We can expect
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here. Wafers and die size Another C
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Figure 69. A cache increases the CP
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Celeron (later gen.), Pentium III,
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Athlon 64 128 KB 512 KB Athlon 64 F
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Xeon processors are incredibly expe
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You can no doubt see that it wouldn
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Page 171 and 172: Intel Pentium 4 (first generation)
Page 173 and 174: Figure 90. The passage of instructi
Page 175 and 176: AMD’s 32 bit Athlon line can bare
Page 177 and 178: FPU - the number cruncher Floating
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Page 183 and 184: Figure 101. Two 486’s from two di
Page 185 and 186: Figure 105. L2 cache running at hal
Page 187 and 188: As was mentioned earlier, the older
Page 189 and 190: Figur 112. The LGA 775 socket for P
Page 191 and 192: The Opteron is the most expensive a
Page 197 and 198: Figure 120. The bus system for an 8
Page 199 and 200: Figure 123. Setting the CPU voltage
Page 203 and 204: Figure 129. A 512 MB DDR RAM module
Page 205 and 206: DDR2-400 400 MHz DDR2 RAM DDR2-533
Page 207 and 208: Figure 137. The motherboard BIOS ca
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Page 211 and 212: Under the Processes tab, you can se
Page 215 and 216: Figure 147. The architecture surrou
Page 217 and 218: Figure 149. The new chipset archite
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Page 223 and 224: Figure 156. The black PCI Express X
Page 225 and 226: Figure 157. The south bridge connec
Page 227 and 228: ● The MCI, EISA and VL buses - fa
Page 229 and 230: Figure 164. The ATA interface works
Page 231 and 232: The ISA bus is thus the I/O bus whi
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Page 235 and 236: Figure 172. The PCI bus is being re
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Page 241 and 242: Figure 178. The keyboard controller
Page 243 and 244: IRQ’s. It didn’t take much befo
Page 245 and 246: Memory-mapped I/O All devices, adap
Page 249 and 250: Figure 188. Here is the Audigy card
Page 251 and 252: Finally, I will look at the FireWir
Page 255 and 256: The super I/O controller is connect
Page 257 and 258: Figure 196. In the middle you see t
Page 259 and 260: Figure 200. The UART controller rep
Page 261 and 262: number of different SCSI standards.
Page 263 and 264: Figur 205. SCSI hard disks anno 200
Page 265 and 266: Figure 207. A USB-based trackball -
Page 267 and 268: USB has thus made the serial ports
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Figure 213. An SATA-hard disk (here
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from the disk. This magnetism will
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In the ”old days”, interfaces s
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Figure 220. This motherboard has an
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Figure 224. Jumper to change betwee
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Figure 228. An ATA-RAID controller
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The existing PATA system has a limi
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CMOS and Setup The startup program
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Figure 237. Standard CMOS Features
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Figure 239. Advanced Chipset Featur
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Figure 241. The system information
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have seen, in the ROM circuits on t
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To perform an upgrade you first dow
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DMA. Direct Memory Access. A system
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