Is Parallel Programming Hard, And, If So, What Can You Do About It?

More documents

Recommendations

Info

$TeX op Mac OS X, met teTeX en TeXShop - Nluug$

224 APPENDIX D. READ-COPY UPDATE IMPLEMENTATIONS1 void rcu_nmi_enter(void)2 {3 struct rcu_dynticks *rdtp;45 rdtp = &__get_cpu_var(rcu_dynticks);6 if (rdtp->dynticks & 0x1)7 return;8 rdtp->dynticks_nmi++;9 smp_mb();10 }1112 void rcu_nmi_exit(void)13 {14 struct rcu_dynticks *rdtp;1516 rdtp = &__get_cpu_var(rcu_dynticks);17 if (rdtp->dynticks & 0x1)18 return;19 smp_mb();20 rdtp->dynticks_nmi++;Figure D.45: NMIs from Dyntick-Idle Mode1 void rcu_irq_enter(void)2 {3 struct rcu_dynticks *rdtp;45 rdtp = &__get_cpu_var(rcu_dynticks);6 if (rdtp->dynticks_nesting++)7 return;8 rdtp->dynticks++;9 smp_mb();10 }1112 void rcu_irq_exit(void)13 {14 struct rcu_dynticks *rdtp;1516 rdtp = &__get_cpu_var(rcu_dynticks);17 if (--rdtp->dynticks_nesting)18 return;19 smp_mb();20 rdtp->dynticks++;21 if (__get_cpu_var(rcu_data).nxtlist ||22 __get_cpu_var(rcu_bh_data).nxtlist)23 set_need_resched();24 }indicate that this CPU may be ignored), and finallyline 10 decrements the ->dynticks_nesting field(which now must be zero to indicate that there is noreason to pay attention to this CPU).Lines 19 and 23 of rcu_exit_nohz() disableand re-enable interrupts, again to avoid interference.Line 20 obtains a pointer to this CPU’srcu_dynticks structure, line 21 increments the->dynticks field (which now must be odd in orderto indicate that RCU must once again pay attentionto this CPU), and line 22 increments the->dynticks_nesting field (which now must havethe value 1 to indicate that there is one reason topay attention to this CPU).D.3.7.2 NMIs from Dyntick-Idle ModeFigure D.45 shows rcu_nmi_enter() and rcu_nmi_exit(), which handle NMI entry and exit, respectively.It is important to keep in mind that enteringan NMI handler exits dyntick-idle mode and viceversa, in other words, RCU must pay attention toCPUs that claim to be in dyntick-idle mode whilethey are executing NMI handlers, due to the factthat NMI handlers can contain RCU read-side criticalsections. This reversal of roles can be quite confusing:you have been warned.Line 5 of rcu_nmi_enter() obtains a pointerto this CPU’s rcu_dynticks structure, and line 6checks to see if this CPU is already under scrutinyby RCU, with line 7 silently returning if so. Otherwise,line 8 increments the ->dynticks_nmi field,which must now have an odd-numbered value. Finally,line 9 executes a memory barrier to ensurethat the prior increment of ->dynticks_nmi is seeby all CPUs to happen before any subsequent RCUread-side critical section.Figure D.46: Interrupts from Dyntick-Idle ModeLine16ofrcu_nmi_exit()againfetchesapointerto this CPU’s rcu_dynticks structure, and line 17checks to see if RCU would be paying attentionto this CPU even if it were not in an NMI, withline 18 silently returning if so. Otherwise, line 19executes a memory barrier to ensure that any RCUread-sidecriticalsectionswithinthehandlerareseenby all CPUs to happen before the increment of the->dynticks_nmi field on line 20. The new value ofthis field must now be even.Quick Quiz D.51: But how does the code inFigure D.45 handle nested NMIs?D.3.7.3 Interrupts from Dyntick-Idle ModeFigure D.46 shows rcu_irq_enter() and rcu_irq_exit(), which handle interrupt entry and exit, respectively.As with NMIs, it is important to notethat entering an interrupt handler exits dyntick-idlemode and vice versa, due to the fact that RCU readsidecritical sections can appear in interrupt handlers.Line 5 of rcu_irq_enter() once again acquires areference to the current CPU’s rcu_dynticks structure.Line 6 increments the ->dynticks_nestingfield, and if the original value was already non-zero(in other words, RCU was already paying attentionto this CPU), line 7 silently returns. Otherwise,line 8 increments the ->dynticks field, which thenmust have an odd-numbered value. Finally, line 9executes a memory barrier so that this incrementis seen by all CPUs as happening before any RCUread-side critical sections that might be in the interrupthandler.
D.3. HIERARCHICAL RCU CODE WALKTHROUGH 2251 static int2 dyntick_save_progress_counter(struct rcu_data *rdp)3 {4 int ret;5 int snap;6 int snap_nmi;78 snap = rdp->dynticks->dynticks;9 snap_nmi = rdp->dynticks->dynticks_nmi;10 smp_mb();11 rdp->dynticks_snap = snap;12 rdp->dynticks_nmi_snap = snap_nmi;13 ret = ((snap & 0x1) == 0) && ((snap_nmi & 0x1) == 0);14 if (ret)15 rdp->dynticks_fqs++;16 return ret;17 }Figure D.47: Code fordyntick save progress counter()Line16ofrcu_irq_exit()doestheby-nowtraditionalacquisition of a reference to the currently runningCPU’s rcu_dynticks structure. Line 17 decrementsthe ->dynticks_nesting field, and, if the resultis non-zero (in other words, RCU must still payattention to this CPU despite exiting this interrupthandler), then line 18 silently returns. Otherwise,line 19 executes a memory barrier so that any RCUread-side critical sections that might have been inthe interrupt handler are seen by all CPUs as havinghappened before the increment on line 20 of the->dynticks field (which must now have an evennumberedvalue). Lines 21 and 22 check to see if theinterrupt handler posted any “rcu” or “rcu bh” callbacks,and, if so, line 23 forces this CPU to reschedule,which has the side-effect of forcing it out ofdynticks-idle mode, as is required to allow RCU tohandle the grace period required by these callbacks.D.3.7.4 Checking for Dyntick-Idle ModeThe dyntick_save_progress_counter() and rcu_implicit_dynticks_qs() functions are used tocheck whether a CPU is in dynticks-idle mode. Thedyntick_save_progress_counter() function is invokedfirst, and returns non-zero if the CPU is currentlyin dynticks-idle mode. If the CPU was not indynticks-idle mode, for example, because it is currentlyhandling an interrupt or NMI, then the rcu_implicit_dynticks_qs() function is called somejiffies later. This function looks at the current statein conjunction with state stored away by the earliercall to dyntick_save_progress_counter(), againreturning non-zero if the CPU either is in dynticksidlemodeorwasindynticks-idlemodeduringtheinterveningtime. Thercu_implicit_dynticks_qs()function may be invoked repeatedly, if need be, untilis returns true.1 static int2 rcu_implicit_dynticks_qs(struct rcu_data *rdp)3 {4 long curr;5 long curr_nmi;6 long snap;7 long snap_nmi;89 curr = rdp->dynticks->dynticks;10 snap = rdp->dynticks_snap;11 curr_nmi = rdp->dynticks->dynticks_nmi;12 snap_nmi = rdp->dynticks_nmi_snap;13 smp_mb();14 if ((curr != snap || (curr & 0x1) == 0) &&15 (curr_nmi != snap_nmi || (curr_nmi & 0x1) == 0)) {16 rdp->dynticks_fqs++;17 return 1;18 }19 return rcu_implicit_offline_qs(rdp);20 }Figure D.48: Code forrcu implicit dynticks qs()Figure D.47 shows the code for dyntick_save_progress_counter(), which is passed a given CPUrcu_statepair’s rcu_data structure. Lines 8 and9 take snapshots of the CPU’s rcu_dynticks structure’s->dynticks and ->dynticks_nmi fields, andthen line 10 executes a memory barrier to ensurethat the snapshot is seen by all CPUs tohave happened before any later processing dependingon these values. This memory barrier pairsup with those in rcu_enter_nohz(), rcu_exit_nohz(), rcu_nmi_enter(), rcu_nmi_exit(), rcu_irq_enter(), and rcu_irq_exit(). Lines 11 and12 store these two snapshots away so that theycan be accessed by a later call to rcu_implicit_dynticks_qs(). Line 13 checks to see if both snapshotshave even-numbered values, indicating thatthe CPU in question was in neither non-idle processstate, an interrupt handler, nor an NMI handler. Ifso, lines 14 and 15 increment the statistical counter->dynticks_fqs, which is used only for tracing. Eitherway, line 16 returns the indication of whetherthe CPU was in dynticks-idle mode.Quick Quiz D.52: Why isn’t there a memorybarrier between lines 8 and 9 of Figure D.47?Couldn’t this cause the code to fetch even-numberedvalues from both the ->dynticks and ->dynticks_nmi fields, even though these two fields never werezero at the same time?Figure D.48 shows the code for rcu_implicit_dynticks_qs(). Lines 9-12 pick up both new valuesfor the CPU’s rcu_dynticks structure’s ->dynticks and ->dynticks_nmi fields, as well as thesnapshots taken by the last call to dyntick_save_progress_counter(). Line 13 then executes amemory barrier to ensure that the values are seen by
Page 1 and 2:
Is Parallel Programming Hard, And,
Page 3 and 4:
Contents1 Introduction 11.1 Histori
Page 5 and 6:
CONTENTSv6 Locking 676.1 Staying Al
Page 7 and 8:
CONTENTSviiB Synchronization Primit
Page 9 and 10:
CONTENTSixE.7.1 Introduction to Pre
Page 11 and 12:
PrefaceThe purpose of this book is
Page 13 and 14:
Chapter 1IntroductionParallel progr
Page 15 and 16:
1.2. PARALLEL PROGRAMMING GOALS 3CP
Page 17 and 18:
1.3. ALTERNATIVES TO PARALLEL PROGR
Page 19 and 20:
1.4. WHAT MAKES PARALLEL PROGRAMMIN
Page 21 and 22:
1.5. GUIDE TO THIS BOOK 9other hand
Page 23 and 24:
Chapter 2Hardware and its HabitsMos
Page 25:
2.1. OVERVIEW 13Therefore, as shown
Page 28 and 29:
16 CHAPTER 2. HARDWARE AND ITS HABI
Page 30 and 31:
18 CHAPTER 2. HARDWARE AND ITS HABI
Page 32 and 33:
20 CHAPTER 3. TOOLS OF THE TRADE1 p
Page 34 and 35:
22 CHAPTER 3. TOOLS OF THE TRADE1 p
Page 36 and 37:
24 CHAPTER 3. TOOLS OF THE TRADE1.1
Page 38 and 39:
26 CHAPTER 3. TOOLS OF THE TRADEQui
Page 40 and 41:
28 CHAPTER 3. TOOLS OF THE TRADE
Page 42 and 43:
30 CHAPTER 4. COUNTING1 atomic_t co
Page 44 and 45:
32 CHAPTER 4. COUNTING4.2.3 Eventua
Page 46 and 47:
34 CHAPTER 4. COUNTINGvanish when t
Page 48 and 49:
36 CHAPTER 4. COUNTINGper-thread va
Page 50 and 51:
38 CHAPTER 4. COUNTING1 unsigned lo
Page 52 and 53:
Page 54 and 55:
42 CHAPTER 4. COUNTING1 #define THE
Page 56 and 57:
Page 58 and 59:
46 CHAPTER 4. COUNTINGReadsAlgorith
Page 60 and 61:
48 CHAPTER 5. PARTITIONING AND SYNC
Page 62 and 63:
Page 64 and 65:
Page 66 and 67:
Page 68 and 69:
Page 70 and 71:
Page 72 and 73:
Page 74 and 75:
Page 76 and 77:
Page 78 and 79:
Page 80 and 81:
68 CHAPTER 6. LOCKING1 int delete(i
Page 82 and 83:
70 CHAPTER 7. DATA OWNERSHIP
Page 84 and 85:
72 CHAPTER 8. DEFERRED PROCESSINGfo
Page 86 and 87:
74 CHAPTER 8. DEFERRED PROCESSINGth
Page 88 and 89:
76 CHAPTER 8. DEFERRED PROCESSING
Page 90 and 91:
78 CHAPTER 8. DEFERRED PROCESSINGfi
Page 92 and 93:
80 CHAPTER 8. DEFERRED PROCESSINGti
Page 94 and 95:
82 CHAPTER 8. DEFERRED PROCESSINGNo
Page 96 and 97:
84 CHAPTER 8. DEFERRED PROCESSING12
Page 98 and 99:
Page 100 and 101:
88 CHAPTER 8. DEFERRED PROCESSINGvo
Page 102 and 103:
90 CHAPTER 8. DEFERRED PROCESSINGLi
Page 104 and 105:
92 CHAPTER 8. DEFERRED PROCESSINGpe
Page 106 and 107:
94 CHAPTER 8. DEFERRED PROCESSINGCa
Page 108 and 109:
96 CHAPTER 8. DEFERRED PROCESSINGTh
Page 110 and 111:
Page 112 and 113:
Page 114 and 115:
Page 116 and 117:
104 CHAPTER 8. DEFERRED PROCESSINGs
Page 118 and 119:
106 CHAPTER 8. DEFERRED PROCESSINGo
Page 120 and 121:
108 CHAPTER 8. DEFERRED PROCESSING
Page 122 and 123:
110 CHAPTER 9. APPLYING RCU1 struct
Page 124 and 125:
112 CHAPTER 9. APPLYING RCU
Page 126 and 127:
114 CHAPTER 10. VALIDATION: DEBUGGI
Page 128 and 129:
116 CHAPTER 11. DATA STRUCTURES
Page 130 and 131:
118 CHAPTER 12. ADVANCED SYNCHRONIZ
Page 132 and 133:
Page 134 and 135:
Page 136 and 137:
Page 138 and 139:
Page 140 and 141:
Page 142 and 143:
Page 144 and 145:
Page 146 and 147:
Page 148 and 149:
Page 150 and 151:
138 CHAPTER 13. EASE OF USEFigure 1
Page 152 and 153:
140 CHAPTER 13. EASE OF USE
Page 154 and 155:
142 CHAPTER 14. TIME MANAGEMENT
Page 156 and 157:
144 CHAPTER 15. CONFLICTING VISIONS
Page 158 and 159:
Page 160 and 161:
Page 162 and 163:
Page 164 and 165:
Page 166 and 167:
154 APPENDIX A. IMPORTANT QUESTIONS
Page 168 and 169:
156 APPENDIX A. IMPORTANT QUESTIONS
Page 170 and 171:
158 APPENDIX B. SYNCHRONIZATION PRI
Page 172 and 173:
160 APPENDIX B. SYNCHRONIZATION PRI
Page 174 and 175:
162 APPENDIX C. WHY MEMORY BARRIERS
Page 176 and 177:
Page 178 and 179:
Page 180 and 181:
Page 182 and 183:
Page 184 and 185:
Page 186 and 187: 174 APPENDIX C. WHY MEMORY BARRIERS
Page 196 and 197: 184 APPENDIX D. READ-COPY UPDATE IM
Page 256 and 257: 244 APPENDIX E. FORMAL VERIFICATION
Page 284 and 285: 272 APPENDIX F. ANSWERS TO QUICK QU
Page 286 and 287:
274 APPENDIX F. ANSWERS TO QUICK QU
Page 288 and 289:
Page 290 and 291:
Page 292 and 293:
Page 294 and 295:
Page 296 and 297:
Page 298 and 299:
Page 300 and 301:
Page 302 and 303:
Page 304 and 305:
Page 306 and 307:
Page 308 and 309:
Page 310 and 311:
Page 312 and 313:
Page 314 and 315:
Page 316 and 317:
Page 318 and 319:
Page 320 and 321:
Page 322 and 323:
Page 324 and 325:
Page 326 and 327:
Page 328 and 329:
Page 330 and 331:
Page 332 and 333:
Page 334 and 335:
Page 336 and 337:
Page 338 and 339:
Page 340 and 341:
Page 342 and 343:
330 APPENDIX G. GLOSSARY(2) A physi
Page 344 and 345:
332 APPENDIX G. GLOSSARYnear by. Th
Page 346 and 347:
334 APPENDIX G. GLOSSARY
Page 348 and 349:
336 BIBLIOGRAPHY[But97]USA, March 2
Page 350 and 351:
338 BIBLIOGRAPHY[HMB06][Hol03][HP95
Page 352 and 353:
340 BIBLIOGRAPHY[McK06] Paul E. McK
Page 354 and 355:
342 BIBLIOGRAPHYtor. Software - Pra
Page 356 and 357:
344 BIBLIOGRAPHY[UoC08][VGS08]Berke
Page 358:
346 APPENDIX H. CREDITSH.4 Original
show all

Is Parallel Programming Hard, And, If So, What Can You Do About It?

Create successful ePaper yourself

Delete template?

Save as template?