Is Parallel Programming Hard, And, If So, What Can You Do About It?

More documents

Recommendations

Info

$TeX op Mac OS X, met teTeX en TeXShop - Nluug$

338 BIBLIOGRAPHY[HMB06][Hol03][HP95][HS08][HW92][IBM94][Inm85][Int92][Int02a]The 20 th Annual International Symposiumon Computer Architecture, pages289–300, May 1993.Thomas E. Hart, Paul E. McKenney,and Angela Demke Brown. Makinglockless synchronization fast: Performanceimplications of memoryreclamation. In 20 th IEEE InternationalParallel and DistributedProcessing Symposium, Rhodes,Greece, April 2006. Available:http://www.rdrop.com/users/paulmck/RCU/hart_ipdps06.pdf[Viewed April 28, 2008].Gerard J. Holzmann. The Spin ModelChecker: Primer and Reference Manual.Addison-Wesley, 2003.John L. Hennessy and David A. Patterson.Computer Architecture: A QuantitativeApproach. Morgan Kaufman,1995.Maurice Herlihy and Nir Shavit. TheArt of Multiprocessor Programming.Morgan Kaufmann, Burlington, MA,USA, 2008.Wilson C. Hsieh and William E. Weihl.Scalable reader-writer locks for parallelsystems. In Proceedings of the 6 th InternationalParallel Processing Symposium,pages 216–230, Beverly Hills, CA,USA, March 1992.IBM Microelectronics and Motorola.PowerPC Microprocessor Family: TheProgramming Environments, 1994.Jack Inman. Implementing loosely coupledfunctions on tightly coupled engines.In USENIX Conference Proceedings,pages 277–298, Portland, OR,June 1985. USENIX Association.International Standards Organization.Information Technology - DatabaseLanguage SQL. ISO, 1992. Available:http://www.contrib.andrew.cmu.edu/~shadow/sql/sql1992.txt[Viewed September 19, 2008].Intel Corporation. Intel Itanium ArchitectureSoftware Developer’s ManualVolume 3: Instruction Set Reference,2002.[Int02b][Int04a][Int04b]Intel Corporation. Intel Itanium ArchitectureSoftware Developer’s ManualVolume 3: System Architecture, 2002.Intel Corporation. IA-32 Intel ArchitectureSoftware Developer’s ManualVolume 2B: Instruction SetReference, N-Z, 2004. Available:ftp://download.intel.com/design/Pentium4/manuals/25366714.pdf[Viewed: February 16, 2005].Intel Corporation. IA-32 Intel ArchitectureSoftware Developer’sManual Volume 3: System ProgrammingGuide, 2004. Available:ftp://download.intel.com/design/Pentium4/manuals/25366814.pdf[Viewed: February 16, 2005].[Int04c] International Business MachinesCorporation. z/Architecture principlesof operation. Available:http://publibz.boulder.ibm.com/epubs/pdf/dz9zr003.pdf [Viewed:February 16, 2005], May 2004.[Int07] Intel Corporation. Intel 64 ArchitectureMemory Ordering WhitePaper, 2007. Available: http://developer.intel.com/products/processor/manuals/318147.pdf[Viewed: September 7, 2007].[Int09] Intel Corporation. Intel 64 andIA-32 Architectures Software DevelopersManual, Volume 3A:System Programming Guide,Part 1, 2009. Available: http://download.intel.com/design/processor/manuals/253668.pdf[Viewed: November 8, 2009].[Jia08] Lai Jiangshan. [RFC][PATCH] rcuclassic: new algorithm for callbacksprocessing.Available: http://lkml.org/lkml/2008/6/2/539 [Viewed December10, 2008], June 2008.[Kan96] Gerry Kane. PA-RISC 2.0 Architecture.Hewlett-Packard ProfessionalBooks, 1996.[KL80]H. T. Kung and Q. Lehman. Concurrentmaintenance of binary search trees.ACM Transactions on Database Systems,5(3):354–382, September 1980.
BIBLIOGRAPHY 339[Kni08][Knu73][Lea97][LLO09]Available: http://portal.acm.org/citation.cfm?id=320619&dl=GUIDE,[Viewed December 3, 2007].John U. Knickerbocker. 3D chip technology.IBM Journal of Research andDevelopment, 52(6), November 2008.Available: http://www.research.ibm.com/journal/rd52-6.html[Viewed: January 1, 2009].Donald Knuth. The Art of ComputerProgramming. Addison-Wesley, 1973.Doug Lea. Concurrent Programmingin Java: Design Principles and Patterns.Addison Wesley Longman, Reading,MA, USA, 1997.Yossi Lev, Victor Luchangco, andMarek Olszewski. Scalable readerwriterlocks. In SPAA ’09: Proceedingsof the twenty-first annual symposium onParallelism in algorithms and architectures,pages 101–110, New York, NY,USA, 2009. ACM.[Lom77] D. B. Lomet. Process structuring,synchronization, and recovery usingatomic actions. SIGSOFT Softw. Eng.Notes, 2(2):128–137, 1977. Available:http://portal.acm.org/citation.cfm?id=808319# [Viewed June 27,2008].[Lov05][LS86][LSH02][Mas92]Robert Love. Linux Kernel Development.Novell Press, second edition,2005.Vladimir Lanin and Dennis Shasha. Asymmetric concurrent b-tree algorithm.In ACM ’86: Proceedings of 1986 ACMFall joint computer conference, pages380–389, LosAlamitos, CA, USA,1986.IEEE Computer Society Press.Michael Lyons, Ed Silha, and BillHay. PowerPC storage model and AIXprogramming. Available: http://www-106.ibm.com/developerworks/eserver/articles/powerpc.html[Viewed: January 31, 2005], August2002.H. Massalin. Synthesis: An EfficientImplementation of Fundamental OperatingSystem Services. PhD thesis,Columbia University, New York, NY,1992.[McK96] Paul E. McKenney. Pattern Languagesof Program Design, volume 2,chapter 31: Selecting Locking Designsfor Parallel Programs, pages501–531. Addison-Wesley, June1996. Available: http://www.rdrop.com/users/paulmck/scalability/paper/mutexdesignpat.pdf [ViewedFebruary 17, 2005].[McK03][McK04]Paul E. McKenney. Using RCU inthe Linux 2.5 kernel. Linux Journal,1(114):18–26, October 2003. Available:http://www.linuxjournal.com/article/6993 [Viewed November14, 2007].Paul E. McKenney. Exploiting DeferredDestruction: An Analysis of Read-Copy-Update Techniques in OperatingSystem Kernels. PhD thesis, OGISchool of Science and Engineeringat Oregon Health and Sciences University,2004. Available: http://www.rdrop.com/users/paulmck/RCU/RCUdissertation.2004.07.14e1.pdf[Viewed October 15, 2004].[McK05a] Paul E. McKenney. Memory orderingin modern microprocessors, part I.Linux Journal, 1(136):52–57, August2005. Available: http://www.linuxjournal.com/article/8211http://www.rdrop.com/users/paulmck/scalability/paper/ordering.2007.09.19a.pdf [ViewedNovember 30, 2007].[McK05b] Paul E. McKenney. Memory orderingin modern microprocessors,part II. Linux Journal, 1(137):78–82, September 2005. Available:http://www.linuxjournal.com/article/8212 http://www.rdrop.com/users/paulmck/scalability/paper/ordering.2007.09.19a.pdf[Viewed November 30, 2007].[McK05c] Paul E. McKenney. Re: [fwd: Re:[patch]real-timepreemption, -rt-2.6.13-rc4-v0.7.52-01]. Available: http://lkml.org/lkml/2005/8/8/108[Viewed March 14, 2006], August 2005.
Page 1 and 2:
Is Parallel Programming Hard, And,
Page 3 and 4:
Contents1 Introduction 11.1 Histori
Page 5 and 6:
CONTENTSv6 Locking 676.1 Staying Al
Page 7 and 8:
CONTENTSviiB Synchronization Primit
Page 9 and 10:
CONTENTSixE.7.1 Introduction to Pre
Page 11 and 12:
PrefaceThe purpose of this book is
Page 13 and 14:
Chapter 1IntroductionParallel progr
Page 15 and 16:
1.2. PARALLEL PROGRAMMING GOALS 3CP
Page 17 and 18:
1.3. ALTERNATIVES TO PARALLEL PROGR
Page 19 and 20:
1.4. WHAT MAKES PARALLEL PROGRAMMIN
Page 21 and 22:
1.5. GUIDE TO THIS BOOK 9other hand
Page 23 and 24:
Chapter 2Hardware and its HabitsMos
Page 25:
2.1. OVERVIEW 13Therefore, as shown
Page 28 and 29:
16 CHAPTER 2. HARDWARE AND ITS HABI
Page 30 and 31:
18 CHAPTER 2. HARDWARE AND ITS HABI
Page 32 and 33:
20 CHAPTER 3. TOOLS OF THE TRADE1 p
Page 34 and 35:
22 CHAPTER 3. TOOLS OF THE TRADE1 p
Page 36 and 37:
24 CHAPTER 3. TOOLS OF THE TRADE1.1
Page 38 and 39:
26 CHAPTER 3. TOOLS OF THE TRADEQui
Page 40 and 41:
28 CHAPTER 3. TOOLS OF THE TRADE
Page 42 and 43:
30 CHAPTER 4. COUNTING1 atomic_t co
Page 44 and 45:
32 CHAPTER 4. COUNTING4.2.3 Eventua
Page 46 and 47:
34 CHAPTER 4. COUNTINGvanish when t
Page 48 and 49:
36 CHAPTER 4. COUNTINGper-thread va
Page 50 and 51:
38 CHAPTER 4. COUNTING1 unsigned lo
Page 52 and 53:
Page 54 and 55:
42 CHAPTER 4. COUNTING1 #define THE
Page 56 and 57:
Page 58 and 59:
46 CHAPTER 4. COUNTINGReadsAlgorith
Page 60 and 61:
48 CHAPTER 5. PARTITIONING AND SYNC
Page 62 and 63:
Page 64 and 65:
Page 66 and 67:
Page 68 and 69:
Page 70 and 71:
Page 72 and 73:
Page 74 and 75:
Page 76 and 77:
Page 78 and 79:
Page 80 and 81:
68 CHAPTER 6. LOCKING1 int delete(i
Page 82 and 83:
70 CHAPTER 7. DATA OWNERSHIP
Page 84 and 85:
72 CHAPTER 8. DEFERRED PROCESSINGfo
Page 86 and 87:
74 CHAPTER 8. DEFERRED PROCESSINGth
Page 88 and 89:
76 CHAPTER 8. DEFERRED PROCESSING
Page 90 and 91:
78 CHAPTER 8. DEFERRED PROCESSINGfi
Page 92 and 93:
80 CHAPTER 8. DEFERRED PROCESSINGti
Page 94 and 95:
82 CHAPTER 8. DEFERRED PROCESSINGNo
Page 96 and 97:
84 CHAPTER 8. DEFERRED PROCESSING12
Page 98 and 99:
Page 100 and 101:
88 CHAPTER 8. DEFERRED PROCESSINGvo
Page 102 and 103:
90 CHAPTER 8. DEFERRED PROCESSINGLi
Page 104 and 105:
92 CHAPTER 8. DEFERRED PROCESSINGpe
Page 106 and 107:
94 CHAPTER 8. DEFERRED PROCESSINGCa
Page 108 and 109:
96 CHAPTER 8. DEFERRED PROCESSINGTh
Page 110 and 111:
Page 112 and 113:
Page 114 and 115:
Page 116 and 117:
104 CHAPTER 8. DEFERRED PROCESSINGs
Page 118 and 119:
106 CHAPTER 8. DEFERRED PROCESSINGo
Page 120 and 121:
108 CHAPTER 8. DEFERRED PROCESSING
Page 122 and 123:
110 CHAPTER 9. APPLYING RCU1 struct
Page 124 and 125:
112 CHAPTER 9. APPLYING RCU
Page 126 and 127:
114 CHAPTER 10. VALIDATION: DEBUGGI
Page 128 and 129:
116 CHAPTER 11. DATA STRUCTURES
Page 130 and 131:
118 CHAPTER 12. ADVANCED SYNCHRONIZ
Page 132 and 133:
Page 134 and 135:
Page 136 and 137:
Page 138 and 139:
Page 140 and 141:
Page 142 and 143:
Page 144 and 145:
Page 146 and 147:
Page 148 and 149:
Page 150 and 151:
138 CHAPTER 13. EASE OF USEFigure 1
Page 152 and 153:
140 CHAPTER 13. EASE OF USE
Page 154 and 155:
142 CHAPTER 14. TIME MANAGEMENT
Page 156 and 157:
144 CHAPTER 15. CONFLICTING VISIONS
Page 158 and 159:
Page 160 and 161:
Page 162 and 163:
Page 164 and 165:
Page 166 and 167:
154 APPENDIX A. IMPORTANT QUESTIONS
Page 168 and 169:
156 APPENDIX A. IMPORTANT QUESTIONS
Page 170 and 171:
158 APPENDIX B. SYNCHRONIZATION PRI
Page 172 and 173:
160 APPENDIX B. SYNCHRONIZATION PRI
Page 174 and 175:
162 APPENDIX C. WHY MEMORY BARRIERS
Page 176 and 177:
Page 178 and 179:
Page 180 and 181:
Page 182 and 183:
Page 184 and 185:
Page 186 and 187:
Page 188 and 189:
Page 190 and 191:
Page 192 and 193:
Page 194 and 195:
Page 196 and 197:
184 APPENDIX D. READ-COPY UPDATE IM
Page 198 and 199:
Page 200 and 201:
Page 202 and 203:
Page 204 and 205:
Page 206 and 207:
Page 208 and 209:
Page 210 and 211:
Page 212 and 213:
Page 214 and 215:
Page 216 and 217:
Page 218 and 219:
Page 220 and 221:
Page 222 and 223:
Page 224 and 225:
Page 226 and 227:
Page 228 and 229:
Page 230 and 231:
Page 232 and 233:
Page 234 and 235:
Page 236 and 237:
Page 238 and 239:
Page 240 and 241:
Page 242 and 243:
Page 244 and 245:
Page 246 and 247:
Page 248 and 249:
Page 250 and 251:
Page 252 and 253:
Page 254 and 255:
Page 256 and 257:
244 APPENDIX E. FORMAL VERIFICATION
Page 258 and 259:
Page 260 and 261:
Page 262 and 263:
Page 264 and 265:
Page 266 and 267:
Page 268 and 269:
Page 270 and 271:
Page 272 and 273:
Page 274 and 275:
Page 276 and 277:
Page 278 and 279:
Page 280 and 281:
Page 282 and 283:
Page 284 and 285:
272 APPENDIX F. ANSWERS TO QUICK QU
Page 286 and 287:
Page 288 and 289:
Page 290 and 291:
Page 292 and 293:
Page 294 and 295:
Page 296 and 297:
Page 298 and 299:
Page 300 and 301: 288 APPENDIX F. ANSWERS TO QUICK QU
Page 342 and 343: 330 APPENDIX G. GLOSSARY(2) A physi
Page 344 and 345: 332 APPENDIX G. GLOSSARYnear by. Th
Page 346 and 347: 334 APPENDIX G. GLOSSARY
Page 348 and 349: 336 BIBLIOGRAPHY[But97]USA, March 2
Page 352 and 353: 340 BIBLIOGRAPHY[McK06] Paul E. McK
Page 354 and 355: 342 BIBLIOGRAPHYtor. Software - Pra
Page 356 and 357: 344 BIBLIOGRAPHY[UoC08][VGS08]Berke
Page 358: 346 APPENDIX H. CREDITSH.4 Original
show all

Is Parallel Programming Hard, And, If So, What Can You Do About It?

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?