Is Parallel Programming Hard, And, If So, What Can You Do About It?

330 APPENDIX G. GLOSSARY(2) A physical location in a CPU cache capableof holding one cache-line unit of data.(3) A physical location in memory capable ofholding one cache-line unit of data, but that italso aligned on a cache-line boundary. For example,the address of the first word of a cacheline in memory will end in 0x00 on systems with256-byte cache lines.Cache Miss: A cache miss occurs when dataneeded by the CPU is not in that CPU’s cache.The data might be missing because of a numberof reasons, including: (1) this CPU hasnever accessed the data before (“startup” or“warmup” miss), (2) this CPU has recently accessedmore data than would fit in its cache, sothat some of the older data had to be removed(“capacity” miss), (3) this CPU has recentlyaccessed more data in a given set 1 than thatset could hold (“associativity” miss), (4) someother CPU has written to the data (or someother data in the same cache line) since thisCPU has accessed it (“communication miss”),or (5) this CPU attempted to write to a cacheline that is currently read-only, possibly due tothatlinebeingreplicatedinotherCPUs’caches.Capacity Miss: Acachemissincurredbecausethecorresponding CPU has recently accessed moredata than will fit into the cache.Code Locking: A simple locking design in which a“global lock” is used to protect a set of criticalsections, sothataccessbyagiventhreadtothatset is granted or denied based only on the set ofthreads currently occupying the set of criticalsections, not based on what data the thread intendsto access. The scalability of a code-lockedprogram is limited by the code; increasing thesize of the data set will normally not increasescalability (in fact, will typically decrease scalabilityby increasing “lock contention”). Contrastwith “data locking”.Communication Miss: A cache miss incurred becausethe some other CPU has written to thecache line since the last time this CPU accessedit.Critical Section: A section of code guarded bysomesynchronizationmechanism, sothatitsexecutionconstrained by that primitive. For example,if a set of critical sections are guarded by1 In hardware-cache terminology, the word “set” is used inthe same way that the word “bucket” is used when discussingsoftware caches.thesamegloballock, thenonlyoneofthosecriticalsections may be executing at a given time.If a thread is executing in one such critical section,any other threads must wait until the firstthread completes before executing any of thecritical sections in the set.Data Locking: A scalable locking design in whicheach instance of a given data structure has itsown lock. If each thread is using a differentinstance of the data structure, then all of thethreads may be executing in the set of criticalsections simultaneously. Data locking has theadvantageofautomatically scalingtoincreasingnumbers of CPUs as the number of instances ofdata grows. Contrast with “code locking”.Direct-Mapped Cache: A cache with only oneway, so that it may hold only one cache linewith a given hash value.Exclusive Lock: An exclusive lock is a mutualexclusionmechanism that permits only onethread at a time into the set of critical sectionsguarded by that lock.False Sharing: If two CPUs each frequently writeto one of a pair of data items, but the pair ofdata items are located in the same cache line,this cache line will be repeatedly invalidated,“ping-ponging” back and forth between the twoCPUs’ caches. This is a common cause of“cache thrashing”, alsocalled “cacheline bouncing”(the latter most commonly in the Linuxcommunity).Fragmentation: A memory pool that has a largeamount of unused memory, but not laid outto permit satisfying a relatively small requestis said to be fragmented. External fragmentationoccurs when the space is divided up intosmall fragments lying between allocated blocksof memory, while internal fragmentation occurswhen specific requests or types of requests havebeen allotted more memory than they actuallyrequested.Fully Associative Cache: A fully associativecache contains only one set, so that it canhold any subset of memory that fits within itscapacity.Grace Period: A grace period is any contiguoustime interval such that any RCU read-side criticalsection that began before the start of thatgrace period is guaranteed to have completed