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SanDisk SD Card

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Revision 2.2Chapter 5 – SPI Protocol<strong>SD</strong> <strong>Card</strong> Product Manual5.23.4 Data WriteThe host may de-select a card (by raising the CS) at any time during the card busy period.The card will release the DataOut line one clock after the CS going high. To check if thecard is still busy it needs to be re-selected by asserting (set to low) the CS signal. The cardwill resume busy signal (pulling DataOut low) one clock after the falling edge of CS.Device Write TimingCSH L***************************************L L L LL L L LH H HL L L LData InN CSX H HHN WRwrite command H H H H H H Hdata blockHN ECH H H H HN DSX X X H H H HData OutZ Z H HH********N CRH H Hcard resp. H H H H H H H data response busy L Z Z Z busy HThe following figure describes stop transmission operation in Multiple Block Writetransfer. The “busy” may appear within N BR clocks after Stop Tran token. If there is nobusy, the host may continue to the next command.Stop Transmission Timing—Multiple Block WriteC<strong>SD</strong>ata InL L Ldata blockLL L L L LH H H H HL L L LH L L LL L L L L L L L L H HN WR1byte N BRN ECN DSstop trantokenH H H H H H HX X X H H H HLData OutH H H Hdata resp. busy H H H H H H H H H busy L Z Z Z busy H5.24 Timing ValuesTable 5-5 shows the timing values and definitions.Table 5-5 Timing Constants DefinitionsValue Min. Max. UnitN CS 0 --- 8 Clock cyclesN CR 1 8 8 Clock cyclesN RC 1 --- 8 Clock cyclesN AC 1 See Note 8 Clock cyclesN WR 1 --- 8 Clock cyclesN EC 0 --- 8 Clock cyclesN DS 0 --- 8 Clock cyclesN BR 0 1 8 Clock cyclesN CX 0 8 8 Clock cyclesNote: The maximum read access time is calculated by the host as follows.N AC (max)= 100 ((TAAC * f PP ) + (100 * NSAC)) ;f PP is the interface clock rate and TAAC & NSAC are given in the C<strong>SD</strong> Register.© 2004 <strong>SanDisk</strong> Corporation 5-19 12/08/04

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