SanDisk SD Card

Revision 2.2Chapter 4 – SD Card Protocol DescriptionSanDisk SD Card Product Manual4.10 Timing DiagramsAll timing diagrams use schematics and abbreviations listed in Table 4-23.Table 4-23Timing Diagram SymbolsSymbolDefinitionS Start Bit (= 0)T Transmitter Bit (Host = 1, Card = 0)P One-cycle pull-up (= 1)E End Bit (= 1)Z High Impedance State (-> = 1)DXData bits“Don’t care” data bits from card* RepetitionCRCCyclic Redundancy Check Bits (7 bits)Card activeHost activeThe difference between the P-bit and Z-bit is that a P-bit is actively driven to HIGH by thecard respectively host output driver, while Z-bit is driven to (respectively kept) HIGH bythe pull-up resistors RCMD respectively RDAT. Actively-driven P-bits are less sensitive tonoise. All timing values are defined in Table 4-24.4.10.1 Command and ResponseCard Identification and Card Operation Conditions TimingThe card identification (CMD2) and card operation conditions (CMD1) timing areprocessed in the open-drain mode. The card response to the host command starts afterexactly NID clock cycles.Identification Timing (Card ID Mode)Host CommandN IDCyclesCID or OCRCMD S T Content CRC E Z Z P *** P S T Content Z ZZAssign a card relative addressThe SEND_RELATIVE_ADDR (CMD 3) for SD Card timing is given bellow. Note thatCMD3 command’s content, functionality and timing are different for MultiMediaCard. Theminimum delay between the host command and card response is NCR clock cycles.Send Relative Address TimingHost CommandN CRCyclesResponseCMD S T Content CRC E Z Z P *** P S T Content CRC Z E Z Z Z© 2004 SanDisk Corporation 4-42 12/08/04