Nios II Processor Reference Handbook

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Software Programming Model8–10 Altera CorporationNios II Processor Reference Handbook September 2004
9. JTAG UART Core withAvalon InterfaceNII51009-1.2Core OverviewThe JTAG universal asynchronous receiver/transmitter (UART) corewith Avalon interface implements a method to communicate serialcharacter streams between a host PC and an SOPC Builder system on anAltera ® FPGA. In many designs, the JTAG UART core eliminates the needfor a separate RS-232 serial connection to a host PC for character I/O. Thecore provides a simple register-mapped Avalon interface that hides thecomplexities of the JTAG interface from embedded softwareprogrammers. Master peripherals (such as a Nios ® II processor)communicate with the core by reading and writing control and dataregisters.The JTAG UART core uses the JTAG circuitry built in to Altera FPGAs,and provides host access via the JTAG pins on the FPGA. The host PC canconnect to the FPGA via any Altera JTAG download cable, such as theUSB-Blaster cable. Software support for the JTAG UART core isprovided by Altera. For the Nios II processor, device drivers are providedin the HAL system library, allowing software to access the core using theANSI C Standard Library stdio.h routines. For the host PC, Alteraprovides JTAG terminal software that manages the connection to thetarget, decodes the JTAG data stream, and displays characters on screen.The JTAG UART core is SOPC Builder-ready and integrates easily intoany SOPC Builder-generated system.FunctionalDescriptionFigure 9–1 shows a block diagram of the JTAG UART core and itsconnection to the JTAG circuitry inside an Altera FPGA. The followingsections describe the components of the core.Altera Corporation 9–1December 2004
Page 1 and 2: Section II. PeripheralSupportThis s
Page 3 and 4: Chapter(s) Date / Version Changes M
Page 5 and 6: 5. SDRAM Controller withAvalon Inte
Page 7 and 8: SDRAM Controller with Avalon Interf
Page 19 and 20: 6. DMA Controller withAvalon Interf
Page 21 and 22: DMA Controller with Avalon Interfac
Page 31 and 32: 7. PIO Core With AvalonInterfaceNII
Page 33 and 34: PIO Core With Avalon InterfaceThe h
Page 35 and 36: PIO Core With Avalon InterfaceThe c
Page 37 and 38: PIO Core With Avalon InterfaceLegac
Page 39 and 40: PIO Core With Avalon InterfaceInter
Page 41 and 42: 8. Timer Core with AvalonInterfaceN
Page 43 and 44: Timer Core with Avalon InterfaceDev
Page 45 and 46: Timer Core with Avalon Interface■
Page 47 and 48: Timer Core with Avalon InterfacecTh
Page 49: Timer Core with Avalon InterfaceWri
Page 53 and 54: JTAG UART Core with Avalon Interfac
Page 65 and 66: 10. UART Core with AvalonInterfaceN
Page 67 and 68: UART Core with Avalon InterfaceThe
Page 69 and 70: UART Core with Avalon InterfaceConf
Page 71 and 72: UART Core with Avalon Interface■
Page 73 and 74: UART Core with Avalon Interface■a
Page 75 and 76: UART Core with Avalon Interface}fpr
Page 77 and 78: UART Core with Avalon InterfaceLimi
Page 79 and 80: UART Core with Avalon Interfacetxda
Page 81 and 82: UART Core with Avalon InterfaceTabl
Page 83 and 84: UART Core with Avalon InterfaceTabl
Page 85 and 86: 11. SPI Core with AvalonInterfaceNI
Page 87 and 88: SPI Core with Avalon InterfaceFigur
Page 89 and 90: SPI Core with Avalon InterfaceMaste
Page 91 and 92: SPI Core with Avalon InterfaceFigur
Page 93 and 94: SPI Core with Avalon InterfaceData
Page 95 and 96: alt_avalon_spi_command()alt_avalon_
Page 97 and 98: alt_avalon_spi_command()rxdata Regi
Page 99 and 100: alt_avalon_spi_command()The control
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12. EPCS Device ControllerCore with
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EPCS Device Controller Core with Av
Page 105 and 106:
EPCS Device Controller Core with Av
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13. Common Flash InterfaceControlle
Page 109 and 110:
Common Flash Interface Controller C
Page 111 and 112:
Common Flash Interface Controller C
Page 113 and 114:
14. System ID Core withAvalon Inter
Page 115 and 116:
alt_avalon_sysid_test()alt_avalon_s
Page 117 and 118:
15. Character LCD (Optrex16207) Con
Page 119 and 120:
Character LCD (Optrex 16207) Contro
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16. Mutex Core with AvalonInterface
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Mutex Core with Avalon Interface■
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Mutex Core with Avalon InterfaceMut
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altera_avalon_mutex_first_lock()alt
Page 129 and 130:
altera_avalon_mutex_open()altera_av
Page 131 and 132:
altera_avalon_mutex_unlock()altera_
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