Sample Solution Written Exam in VLSI I - Integrated Systems ...

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5 The Case for Synchronous Design . . . . . . . . . . . . . . . . . (21 points)Problem 1: Warm up.(a) Describe two disadvantages of synchronous circuit operation.(2)(b) What are the two guiding principles of synchronous design?(2)Problem 2: Clocking disciplines and hazards.Mark all the correct answers.(a) Which clocking disciplines allow for an arbitrary slow clock frequency?(1)A. Synchronous edge-triggered clockingB. Self-timedC. Ad hoc asynchronous(b) Where are hazards allowed?(1)A. On the write line of an asynchronous RAMB. On the synchronous preset port of flip-flop registersC. On the state signal of a FSM in a synchronous designD. On all signals in a self-timed design(c) Which statements regarding self-timed clocking are correct?(1)A. Hazard-suppression logic is not necessary.B. A global signal is necessary to control the handshake signal.C. Self-timed clocking helps to avoid problems at the circuit interfaces.D. It is possible to achieve a better performance than worst-case with selftimedclocking.Page 22 of 30VLSI I Exam Summer 2009
Problem 3: Synchronous designClkxCBlock BBlock Ameans level sensitivemeans single edge triggeredFigure 9: Circuit extracted out of a larger design.(a) Mark the clocking discipline of the circuit extract in Fig. 9(1)A. Synchronous edge-triggered clockingB. Asynchronous clockingC. Clock-as-clock-canD. Self-timed clocking(b) Explain the functionality of block A in Fig. 9 and explain potential problems with (3)this design.(c) Bonus question: Give an alternative solution that avoids this problem by only (2)altering block A only.Page 23 of 30VLSI I Exam Summer 2009
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