HLASM: V1R6 Language Ref

Operand entriesRegistersYou can specify a register in an operand for use as an arithmetic accumulator, abase register, an index register, and as a general depository for data to which youwant to refer repeatedly.You must be careful when specifying a register whose contents have been affectedby the execution of another machine instruction, the control program, or anIBM-supplied system macro instruction.For some machine instructions, you are limited in which registers you can specifyin an operand.|The expressions used to specify registers must have absolute values; in general,registers 0 through 15 can be specified for machine instructions. However, thefollowing restrictions on register usage apply:v The even-numbered registers must be specified for the following groups ofinstructions:– The double-shift instructions– Most multiply and divide instructions– The move long and compare logical long instructionsv If the NOAFPR ACONTROL operand is specified, then only the floating-pointregisters (0, 2, 4, or 6) may be specified for floating-point instructions.v If the AFPR ACONTROL operand is specified, then one of the floating-pointregisters 0, 1, 4, 5, 8, 9, 12 or 13 can be specified for the instructions that useextended floating-point data in pairs of registers, such as AXR, SXR, LTXBR, andSQEBR.v If the NOAFPR ACONTROL operand is specified, then either floating-pointregister 0 or 4 must be specified for these instructions.v For a processor with a vector facility, the even-numbered vector registers (0, 2, 4,6, 8, 10, 12, 14) must be specified in vector-facility instructions that are used tomanipulate long floating-point data or 64-bit signed binary data in vectorregisters.The assembler checks the registers specified in the instruction statements of theabove groups. If the specified register does not comply with the stated restrictions,the assembler issues a diagnostic message and does not assemble the instruction.Binary zeros are generated in place of the machine code.Register usage by machine instructionsRegisters that are not explicitly coded in symbolic assembler languagerepresentation of machine instructions, but are nevertheless used by assembledmachine instructions, are divided into two categories:v Base registers that are implicit in the symbolic addresses specified. (See“Addresses” on page 84.) The registers can be identified by examining the objectcode or the USING instructions that assign base registers for the source module.v Registers that are used by machine instructions, but don’t appear in assembledobject code.– For double shift and fullword multiply and divide instructions, theodd-numbered register, whose number is one greater than the even-numberedregister specified as the first operand.– For Move Long and Compare Logical Long instructions, the odd-numberedregisters, whose number is one greater than even-numbered registersspecified in the two operands.Chapter 4. Machine instruction statements 83